公开(公告)号：US07184113B2

公开(公告)日：2007-02-27

申请号：US10267744

申请日：2002-10-10

Applicant: Heum-il Baek

Inventor： Heum-il Baek

IPC: G02F1/1368 ,  G02F1/1335 ,  H01L29/12

CPC classification number: G02F1/133555 ,  G02F1/133553 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136231 ,  G02F2001/13685

Abstract: An array substrate for a transflective liquid crystal display device, including: a substrate; a data line and a gate line on the substrate, the data line and the gate line defining a pixel region; a thin film transistor connected to the data line and the gate line, the thin film transistor including source and drain electrodes, an ohmic contact layer on the source and drain electrodes, an active layer and a gate electrode over the active layer; a reflective plate at the pixel region, the reflective plate having a transmissive hole; and a pixel electrode over the reflective plate, the pixel electrode being connected to the drain electrode.

Abstract translation: 一种半透射型液晶显示装置的阵列基板，包括：基板; 数据线和栅极线，所述数据线和所述栅极线限定像素区域; 连接到数据线和栅极线的薄膜晶体管，薄膜晶体管包括源极和漏极，源极和漏极上的欧姆接触层，有源层上的有源层和栅电极; 在像素区域处的反射板，反射板具有透射孔; 以及在反射板上方的像素电极，像素电极连接到漏电极。

公开(公告)号：US07116392B2

公开(公告)日：2006-10-03

申请号：US11004097

申请日：2004-12-06

Applicant: Heum-il Baek

Inventor： Heum-il Baek

IPC: G02F1/1335 ,  G02F1/13

CPC classification number: G02F1/133555 ,  G02F1/133553 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136231 ,  G02F2001/13685

Abstract: A fabricating method of an array substrate for a transflective liquid crystal display device includes: sequentially depositing a first metal layer and an impurity-doped amorphous silicon layer on a substrate and etching the first metal layer and the impurity-doped amorphous silicon layer through a first mask process to form source and drain electrodes, a data line and an ohmic contact layer. An amorphous silicon layer, a first insulating layer and a second metal layer are sequentially deposited on the source and drain electrodes, the data line and the ohmic contact layer and etching the amorphous silicon layer, the first insulating layer and the second metal layer through a second mask process to form a gate electrode, a gate line and an active layer, the gate line defining a pixel region with the data line. A second insulating layer is formed on the gate electrode and the gate line. A reflective plate is formed on the second insulating layer at the pixel region through a third mask process, the reflective plate having a transmissive hole. A third insulating layer is deposited on the reflective plate and etching the third insulating layer through a fourth mask process to form a drain contact hole exposing the drain electrode and a transmissive groove corresponding to the transmissive hole. A pixel electrode is formed on the third insulating layer through a fifth mask process, the pixel electrode being connected to the drain electrode through the drain contact hole.