-
公开(公告)号:US20170249223A1
公开(公告)日:2017-08-31
申请号:US15500064
申请日:2015-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK , Harvey RAY , Chris Michael BRUEGGEN
IPC: G06F11/20
CPC classification number: G06F11/2092 , G06F11/108 , G06F11/2094 , G06F2201/805
Abstract: According to an example, data corruption and single point of failure is prevented in a fault-tolerant memory fabric with multiple redundancy controllers by granting, by a parity media controller, a lock of a stripe to a redundancy controller to perform a sequence on the stripe. The lock may be broken in response to determining a failure of the redundancy controller prior to completing the sequence. In response to breaking the lock, the parity cacheline of the stripe may be flagged as invalid. Also, a journal may be updated to document the breaking of the lock.
-
公开(公告)号:US20170192714A1
公开(公告)日:2017-07-06
申请号:US15313690
申请日:2014-07-31
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Harvey RAY , Derek Alan SHERLOCK , Gregg B. LESARTRE
IPC: G06F3/06
CPC classification number: G06F3/0647 , G06F3/0619 , G06F3/065 , G06F3/0656 , G06F3/0683 , G06F11/108
Abstract: According to an example, hierarchal stripe locks may be obtained for a source stripe and a destination stripe. In response to receiving data for the source stripe, the data is written from the source stripe to the destination stripe, and the hierarchal stripe locks are released for the source stripe and the destination stripe. In response to receiving the data-migrated token, the hierarchal stripe locks are released for the source stripe and the destination stripe.
-
公开(公告)号:US20180373573A1
公开(公告)日:2018-12-27
申请号:US15747043
申请日:2015-07-24
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK , Gary GOSTIN
IPC: G06F9/52
Abstract: In some examples, a lock manager may receive a lock release message from a processor. The lock release message may identify a lock that synchronizes control of a shared resource. The lock manager may determine, for the lock identified in the lock release message, multiple processors contending to acquire the lock and select a particular processor among the multiple processors to acquire the lock.
-
公开(公告)号:US20170242769A1
公开(公告)日:2017-08-24
申请号:US15500063
申请日:2015-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK , Harvey RAY , Michael KONTZ
IPC: G06F11/20
CPC classification number: G06F11/2092 , G06F11/0727 , G06F11/0751 , G06F11/1084 , G06F2201/805 , G06F2201/82 , G06F2211/1009
Abstract: According to an example, a failed component in a fault-tolerant memory fabric may be determined by transmitting request packets along a plurality of routes between the redundancy controller and a media controller in periodic cycles. The redundancy controller may determine whether route failures for all of the plurality of routes have occurred within a number of consecutive periodic cycles. In response to determining that route failures for all of the plurality of routes have occurred within a number of consecutive periodic cycles, the media controller is established as failed. In response to determining that route failures for less than all of the plurality of routes have occurred within the number of consecutive periodic cycles, a fabric device is established as failed.
-
公开(公告)号:US20180307601A1
公开(公告)日:2018-10-25
申请号:US15768557
申请日:2015-10-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK
IPC: G06F12/0804
Abstract: According to an example, cache operations may be managed by detecting that a cacheline in a cache is being dirtied, determining a current epoch number, in which the current epoch number is associated with a store operation and wherein the epoch number is incremented each time a thread of execution completes a flush-barrier checkpoint, and inserting an association of the cacheline to the current epoch number into a field of the cacheline that is being dirtied.
-
公开(公告)号:US20180217933A1
公开(公告)日:2018-08-02
申请号:US15747755
申请日:2015-07-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK , Shawn WALKER
IPC: G06F12/0862 , G06F12/0873 , G06F12/0804 , G06F12/0817 , G06F9/30 , G06F12/0891
CPC classification number: G06F12/0862 , G06F9/3004 , G06F12/0804 , G06F12/0817 , G06F12/0873 , G06F12/0891
Abstract: An apparatus for assisting a flush of a cache is described herein. The apparatus comprises processing element. The processing element is to probe a cache line at an offset address and write the cache line at the offset address to a non-volatile memory in response to a flush instruction at a first address.
-
公开(公告)号:US20170242753A1
公开(公告)日:2017-08-24
申请号:US15500067
申请日:2015-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK , Harvey RAY
CPC classification number: G06F11/1088 , G06F3/0619 , G06F3/064 , G06F3/0689 , G06F11/1443 , G06F11/2007
Abstract: According to an example, a retransmission sequence involving non-idempotent primitives in a fault-tolerant memory fabric may be modified. For example, a redundancy controller may request a sequence to access a stripe in the fault-tolerant memory fabric, wherein the sequence involves a non-idempotent primitive. In response to determining an expiration of a time threshold for the non-idempotent primitive, the redundancy controller may read other data in other cachelines in the stripe, calculate a new parity value by performing an idempotent exclusive-or primitive on the new data with the other data in the stripe, and write the new parity to the stripe using an idempotent write primitive.
-
8.
公开(公告)号:US20170242745A1
公开(公告)日:2017-08-24
申请号:US15500080
申请日:2015-03-31
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan SHERLOCK , Harvey RAY
IPC: G06F11/07
CPC classification number: G06F11/0793 , G06F11/0727 , G06F11/0751 , G06F11/079 , G06F11/1076 , G06F11/2017 , G06F11/2092
Abstract: An example device in accordance with an aspect of the present disclosure includes a redundancy controller and/or memory module to prevent data corruption and single point of failure in a fault-tolerant memory fabric. Devices include engines to issue and/or respond to primitive requests, identify failures and/or fault conditions, and receive and/or issue containment mode indications.
-
-
-
-
-
-
-