摘要:
A first video signal generation circuit newly generates pixels between pixels in a first progressive video field signal outputted by a first progressive video generation circuit, and outputs a third progressive video field signal. A second video signal generation circuit newly generates pixels between pixels in a second progressive video field signal outputted by a second progressive video generation circuit, and outputs a fourth progressive video field signal. A comparison circuit compares the third progressive video field signal and the fourth progressive video field signal, and outputs the result of the comparison as motion amount information. An output circuit synthesizes an intra-field interpolation signal and a frame interfiled interpolation signal on the basis of the motion amount information, and outputs a composite signal as a progressive video signal.
摘要:
An inter-frame motion detector detects the presence or absence of motion between frames on the basis of judgment whether or not an inter-frame difference is not more than a set value. A vertical edge continuity detector calculates difference values between an object pixel and pixels above or below the object pixel in an inlaid picture, and detects whether or not there is horizontal continuity of an inter-field vertical edge on the basis of judgment whether or not the signs of the difference values are the same continuously over not less than a predetermined number of pixels, in the horizontal direction, including the object pixel. When it is detected that there is no motion between frames, and it is detected that there is horizontal continuity of the inter-field vertical edge, it is judged that a picture is in a completely still state.
摘要:
A binarizer binarizes a video signal input from an A/D converter and a video signal output from a line memory using an average luminance value provided from a detection window video signal processor as a threshold value, and outputs a binary pattern. A reference pattern generater generates a plurality of reference patterns. An angle detector compares the binary pattern with each of the plurality of reference patterns, and outputs the angle of a matched reference pattern as angle information. An arc shape detector outputs the edge angle information of a picture based on a combination of the angle information of an interpolation scanning line including an object interpolation pixel and the angle information of interpolation scanning lines above and below the interpolation scanning line.
摘要:
A vertical interpolation circuit interpolates an interpolated pixel with pixels located on upper and lower vertical positions, and outputs a vertical interpolated value. An oblique averaging part averages pixels obliquely located with respect to the interpolated pixel on the basis of an oblique edge angle signal, and outputs the result of calculation as an oblique average. An oblique difference absolute value operation part calculates the absolute value of the difference between the values of the pixels obliquely located with respect to the interpolated pixel on the basis of the oblique edge angle signal, and outputs the result of calculation as an oblique difference absolute value. A mixing part outputs the vertical interpolated value, the oblique average or a mixed value thereof as an interpolated pixel value on the basis of the oblique difference absolute value.
摘要:
A plurality of interlaced video signals respectively corresponding to a plurality of continuous fields are generated by first, second, and third one-field delay circuits on the basis of an inputted interlaced video signal. A first progressive video field signal is generated by a first progressive video generation circuit on the basis of the plurality of interlaced video signals. A second progressive video field signal is generated by a second progressive video generation circuit on the basis of the plurality of interlaced video signals. Motion amount information in the vertical direction of a picture is calculated by a comparison circuit on the basis of the first progressive video field signal and the second progressive video field signal.
摘要:
A first video signal generation circuit newly generates pixels between pixels in a first progressive video field signal outputted by a first progressive video generation circuit, and outputs a third progressive video field signal. A second video signal generation circuit newly generates pixels between pixels in a second progressive video field signal outputted by a second progressive video generation circuit, and outputs a fourth progressive video field signal. A comparison circuit compares the third progressive video field signal and the fourth progressive video field signal, and outputs the result of the comparison as motion amount information. An output circuit synthesizes an intra-field interpolation signal and a frame interfiled interpolation signal on the basis of the motion amount information, and outputs a composite signal as a progressive video signal.
摘要:
A binarizer binarizes a video signal input from an A/D converter and a video signal output from a line memory using an average luminance value provided from a detection window video signal processor as a threshold value, and outputs a binary pattern. A reference pattern generator generates a plurality of reference patterns. An angle detector compares the binary pattern with each of the plurality of reference patterns, and outputs the angle of a matched reference pattern as angle information. An arc shape detector outputs the edge angle information of a picture based on a combination of the angle information of an interpolation scanning line including an object interpolation pixel and the angle information of interpolation scanning lines above and below the interpolation scanning line.
摘要:
A plurality of interlaced video signals respectively corresponding to a plurality of continuous fields are generated by first, second, and third one-field delay circuits on the basis of an inputted interlaced video signal. A first progressive video field signal is generated by a first progressive video generation circuit on the basis of the plurality of interlaced video signals. A second progressive video field signal is generated by a second progressive video generation circuit on the basis of the plurality of interlaced video signals. Motion amount information in the vertical direction of a picture is calculated by a comparison circuit on the basis of the first progressive video field signal and the second progressive video field signal.
摘要:
A binarizer binarizes a video signal VD1 inputted from an A/D converter and a video signal VD2 outputted from a line memory using an average luminance value LU fed from a detection window video signal processor as a threshold value, to output a binary pattern BI. A reference pattern generator generates a plurality of reference patterns RA. A first pattern matching angle detector compares the binary pattern BI with each of the plurality of reference patterns RA, to output the angle of the reference pattern RA which matches with the binary pattern BI as angle information PA. A detected isolation point remover 4 outputs angle signal AN when the angle information PA has continuity.
摘要:
In an image display apparatus, a video signal is divided for each field into a plurality of sub-fields, each of which is weighted according to the duration of time or number of pulses. The plurality of sub-fields are temporally superimposed for display, so that a grayscale representation is provided. A video signal for the current field is delayed by one field, and output as a video signal for the previous field. Based on the video signal for the current field and the video signal for the previous field, a luminance gradient of an image is detected. A difference between the video signal for the current field and the video signal for the previous field is calculated. Based on the calculated difference and the detected gradient, the amount of motion of the image is calculated by a detecting circuit. Based on the calculated amount of motion of the image, dynamic false contours are reduced by an image data processing circuit.