公开(公告)号：US6011535A

公开(公告)日：2000-01-04

申请号：US744054

申请日：1996-11-05

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0283

摘要： A scanning circuit for a display device having an array of pixels. One embodiment of the scanning circuit includes L scan control signal lines, first logic circuits to operate on signals from M of the L scan control signal lines, flip-flop circuits communicating with the first logic circuits, N timing control signal lines, and second logic circuits coupled to operate on signal from the N timing control signal lines and the flip-flop circuits.

摘要翻译： 一种具有像素阵列的显示装置的扫描电路。 扫描电路的一个实施例包括L扫描控制信号线，对来自L扫描控制信号线的M的信号进行操作的第一逻辑电路，与第一逻辑电路通信的触发电路，N个定时控制信号线和第二逻辑 耦合到来自N个定时控制信号线和触发器电路的信号的电路。

公开(公告)号：US06741231B2

公开(公告)日：2004-05-25

申请号：US10198796

申请日：2002-07-17

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

IPC分类号： G09G336

CPC分类号： G09G3/3677 ,  G09G2310/0283

摘要： An active matrix display device has a number of pixels arranged in matrix form, signal lines for supplying display signals to the pixels, and a driver circuit for driving the signal lines. The driver circuit includes a frequency divider circuit for frequency-dividing input multi-phase clock signals, a synchronous counter circuit for frequency-dividing part of the input multi-phase clock signals, and a decoder circuit for selecting a desired one of the signal lines based on outputs of the frequency divider circuit and the synchronous counter circuit.

摘要翻译： 有源矩阵显示装置具有以矩阵形式布置的多个像素，用于向像素提供显示信号的信号线以及用于驱动信号线的驱动电路。 驱动器电路包括用于对输入多相时钟信号进行分频的分频器电路，用于对输入多相时钟信号的一部分进行分频的同步计数器电路，以及用于选择所需信号线的解码器电路 基于分频器电路和同步计数器电路的输出。

公开(公告)号：US06421041B2

公开(公告)日：2002-07-16

申请号：US09835266

申请日：2001-04-12

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hidehiko Chimura

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hidehiko Chimura

IPC分类号： G09G336

CPC分类号： G09G3/3666 ,  G09G3/3655 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0297 ,  G09G2352/00

摘要： A plurality of partial image display portions are provided. Each of the partial image display portions is formed by at least one signal line driver circuits and at least one of scanning line driver circuits. Each partial image display portion displays a part of one frame of image. The whole one frame of image is displayed by all of the partial image display portions.

摘要翻译： 提供多个部分图像显示部分。 每个部分图像显示部分由至少一个信号线驱动电路和扫描线驱动电路中的至少一个形成。 每个部分图像显示部分显示一帧图像的一部分。 图像的整个一帧由所有部分图像显示部分显示。

公开(公告)号：US5907313A

公开(公告)日：1999-05-25

申请号：US743990

申请日：1996-11-05

申请人： Yasushi Kubota ,  Kenichi Katoh ,  Hidehiko Chimura ,  Jun Koyama

发明人： Yasushi Kubota ,  Kenichi Katoh ,  Hidehiko Chimura ,  Jun Koyama

IPC分类号： G02F1/136 ,  G02F1/133 ,  G02F1/1368 ,  G09G3/36 ,  G11C19/00 ,  H01L29/786

CPC分类号： G09G3/3677 ,  G09G2330/021 ,  G09G2330/022

摘要： A matrix-type display device in which a number of pixels are arranged and a scanning line and a signal line to which a display signal is output are connected to each pixel. A signal line driver circuit in which a decoder circuit is controlled by a counter circuit, or a scanning line driver circuit in which a decoder circuit is controlled by a counter circuit is divided into a plurality of sections. A clock signal and/or a power supply voltage is selectively supplied to the respective sections.

摘要翻译： 其中排列有多个像素并且将扫描线和输出显示信号的信号线连接到每个像素的矩阵型显示装置。 其中解码器电路由计数器电路控制的信号线驱动器电路或其中解码器电路由计数器电路控制的扫描线驱动器电路被分成多个部分。 选择性地将时钟信号和/或电源电压提供给各个部分。

公开(公告)号：US5654733A

公开(公告)日：1997-08-05

申请号：US565859

申请日：1995-12-01

申请人： Hidehiko Chimura ,  Jun Koyama

发明人： Hidehiko Chimura ,  Jun Koyama

IPC分类号： G09G3/36 ,  G02F1/13

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G2310/0297 ,  G09G2330/021

摘要： An active matrix liquid crystal electrooptical device consuming only a small amount of electric power without producing flicker. The electrooptical device comprises a plurality of pixels arranged in rows and columns. Each pixel has a switching element. Scanning lines for turning on and off the switching elements and signal lines to which display signals are produced are connected with the pixels. The device further includes plural signal line driver circuits. Each driver circuit produces a display signal to the corresponding signal line. Each display signal exhibits one polarity during one frame period. The polarity of the display signal produced by at least one of the driver circuits is different from the polarity of the display signal produced by the other driver circuit. The polarity is inverted every frame. The signal lines connected with any one of the driver circuits are connected with the pixels which are, in turn, connected with one of the scanning lines.

摘要翻译： 有源矩阵液晶电光器件仅消耗少量电能而不产生闪烁。 电光装置包括以行和列排列的多个像素。 每个像素具有开关元件。 用于打开和关闭产生显示信号的开关元件和信号线的扫描线与像素连接。 该装置还包括多个信号线驱动电路。 每个驱动电路产生到相应信号线的显示信号。 每个显示信号在一帧期间表现出一个极性。 由至少一个驱动电路产生的显示信号的极性与由另一驱动电路产生的显示信号的极性不同。 极性每帧反转。 与任何一个驱动电路连接的信号线与与扫描线之一连接的像素连接。

公开(公告)号：US06798394B1

公开(公告)日：2004-09-28

申请号：US08539051

申请日：1995-10-04

申请人： Hidehiko Chimura

发明人： Hidehiko Chimura

IPC分类号： G09G336

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G5/20 ,  G09G2300/0408 ,  G09G2320/02

摘要： In an active matrix panel, a pixel matrix which includes a plurality of gate lines, a plurality of source lines, and thin film transistors is formed on a first transparent substrate. A second transparent substrate is formed opposite to the first transparent substrate. A liquid crystal material is disposed between the first and second transparent substrates. A gate line driver circuit and a source line driver circuit are formed by a P-type, an N-type, or a complementary type thin film transistors (including silicon film) on the first transparent substrate. Also, a data processing circuit for performing mask processing is formed by the thin film transistors on the first transparent substrate.

摘要翻译： 在有源矩阵面板中，在第一透明衬底上形成包括多条栅极线，多条源极线和薄膜晶体管的像素矩阵。 第二透明基板与第一透明基板相对地形成。 液晶材料设置在第一和第二透明基板之间。 栅极线驱动电路和源极线驱动电路由第一透明基板上的P型，N型或互补型薄膜晶体管（包括硅膜）形成。 此外，用于进行掩模处理的数据处理电路由第一透明基板上的薄膜晶体管形成。

公开(公告)号：US06590562B2

公开(公告)日：2003-07-08

申请号：US10164221

申请日：2002-06-04

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hidehiko Chimura

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hidehiko Chimura

IPC分类号： G09G336

CPC分类号： G09G3/3666 ,  G09G3/3655 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0297 ,  G09G2352/00

摘要： A plurality of partial image display portions are provided. Each of the partial image display portions is formed by at least one signal line driver circuits and at least one of scanning line driver circuits. Each partial image display portion displays a part of one frame of image. The whole one frame of image is displayed by all of the partial image display portions.

公开(公告)号：US06246399B1

公开(公告)日：2001-06-12

申请号：US08617415

申请日：1996-03-18

申请人： Yasukuni Yamane ,  Jun Koyama ,  Hidehiko Chimura

发明人： Yasukuni Yamane ,  Jun Koyama ,  Hidehiko Chimura

IPC分类号： G09G318

CPC分类号： G09G3/3666 ,  G09G3/3688 ,  G09G2330/021

摘要： An active matrix liquid crystal display consuming only a small amount of electric power. The liquid crystal display has two driver circuits which drive two sets of signal lines, respectively, One set of signal lines creates the upper half of a frame of image displayed on the viewing screen, while the other set of signal lines creates the lower half of the image. An image signal for creating the frame of image is supplied to the two driver circuits alternately so that when one of the driver circuits is operating, the other is halted or put on standby.

摘要翻译： 有源矩阵液晶显示器仅消耗少量电力。 液晶显示器具有分别驱动两组信号线的两个驱动电路：一组信号线产生在观看屏幕上显示的图像帧的上半部分，而另一组信号线产生下一半信号线 图片。 用于产生图像帧的图像信号被交替地提供给两个驱动器电路，使得当其中一个驱动器电路工作时，另一个停止或待机。

公开(公告)号：US5990857A

公开(公告)日：1999-11-23

申请号：US841585

申请日：1997-04-30

申请人： Yasushi Kubota ,  Kenichi Katoh ,  Jun Koyama ,  Hidehiko Chimura ,  Yukio Tanaka

发明人： Yasushi Kubota ,  Kenichi Katoh ,  Jun Koyama ,  Hidehiko Chimura ,  Yukio Tanaka

IPC分类号： G09G3/20 ,  G09G3/36 ,  G11C19/00

CPC分类号： G09G3/3685 ,  G09G3/3648 ,  G09G3/3666 ,  G09G2310/0286 ,  G09G2330/021

摘要： The shift register of this invention for sequentially transferring a digital signal in synchronization with a clock signal includes: a plurality of circuit blocks connected in series, each including a prescribed number of sequential latch circuits, each latch circuit outputting a signal corresponding to an input signal based on the clock signal; and a plurality of clock signal control circuits provided for the respective circuit blocks for controlling the supply of the clock signal to the latch circuits in the corresponding circuit blocks, wherein the control of the supply of the clock signal by each clock signal control circuit to the latch circuits in the corresponding circuit block is conducted in response to output signals from prescribed latch circuits in the circuit blocks preceding and subsequent to the corresponding circuit block.

摘要翻译： 本发明的用于与时钟信号同步地顺序传送数字信号的移位寄存器包括：串联连接的多个电路块，每个电路块包括规定数量的顺序锁存电路，每个锁存电路输出对应于输入信号的信号 基于时钟信号; 以及多个时钟信号控制电路，用于各个电路块，用于控制向对应的电路块中的锁存电路提供时钟信号，其中控制由每个时钟信号控制电路将时钟信号提供给 响应于相应电路块之前和之后的电路块中来自规定的锁存电路的输出信号，进行相应电路块中的锁存电路。

公开(公告)号：US20080084375A1

公开(公告)日：2008-04-10

申请号：US11985507

申请日：2007-11-15

申请人： Hidehiko Chimura

发明人： Hidehiko Chimura

IPC分类号： G09G3/36

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G5/20 ,  G09G2300/0408 ,  G09G2320/02

摘要： In an active matrix panel, a pixel matrix which includes a plurality of gate lines, a plurality of source lines, and thin film transistors is formed on a first transparent substrate. A second transparent substrate is formed opposite to the first transparent substrate. A liquid crystal material is disposed between the first and second transparent substrates. A gate line driver circuit and a source line driver circuit are formed by a P-type, an N-type, a complementary type thin film transistors (including silicon film) or the like on the first transparent substrate. Also, a data processing circuit for performing mask processing or the like is formed by the thin film transistors or the like on the first transparent substrate.

摘要翻译： 在有源矩阵面板中，在第一透明衬底上形成包括多条栅极线，多条源极线和薄膜晶体管的像素矩阵。 第二透明基板与第一透明基板相对地形成。 液晶材料设置在第一和第二透明基板之间。 栅极线驱动电路和源极线驱动电路由第一透明基板上的P型，N型，互补型薄膜晶体管（含硅膜）等构成。 此外，用于进行掩模处理等的数据处理电路由第一透明基板上的薄膜晶体管等形成。