公开(公告)号：US08390029B2

公开(公告)日：2013-03-05

申请号：US12867427

申请日：2009-01-23

申请人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/00

CPC分类号： H01L29/7786 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/432 ,  H01L29/66462

摘要： A semiconductor device includes an undoped GaN layer (103) formed on a substrate (101), an undoped AlGaN layer (104) formed on the undoped GaN layer (103) and having a band gap energy larger than that of the undoped GaN layer (103), a p-type AlGaN layer (105) and a high-concentration p-type GaN layer (106) formed on the undoped AlGaN layer (104), and an n-type AlGaN layer (107) formed on the high-concentration p-type GaN layer (106). A gate electrode (112) which makes ohmic contact with the high-concentration p-type GaN layer (106) is formed on the high-concentration p-type GaN layer (106) in a region thereof exposed through an opening (107a) formed in the n-type AlGaN layer (107).

摘要翻译： 半导体器件包括形成在衬底（101）上的未掺杂的GaN层（103），形成在未掺杂的GaN层（103）上并且具有比未掺杂的GaN层的带隙能量大的带隙能量的未掺杂的AlGaN层（104） 103），形成在未掺杂的AlGaN层（104）上的p型AlGaN层（105）和高浓度p型GaN层（106）以及形成在高掺杂AlGaN层上的n型AlGaN层（107） 浓度p型GaN层（106）。 在高浓度p型GaN层（106）上形成与高浓度p型GaN层（106）欧姆接触的栅电极（112），其形成在通过形成的开口（107a）的部分露出的区域 在n型AlGaN层（107）中。

公开(公告)号：US08569797B2

公开(公告)日：2013-10-29

申请号：US13185818

申请日：2011-07-19

申请人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda

发明人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda

IPC分类号： H01L29/80

CPC分类号： H01L29/7783 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： A field-effect transistor includes a first semiconductor layer formed on a substrate, and a second semiconductor layer. The first semiconductor layer has a containing region provided as an isolation region which contains non-conductive impurities, and a non-containing region which contains no non-conductive impurities. A first region is defined by a vicinity of a portion of the interface between the containing region and the non-containing region, the portion of the interface being below a gate electrode, the vicinity including the portion of the interface and being included in the containing region. The second semiconductor layer includes a second region which is located directly above the first region. The concentration of the non-conductive impurities of the second region is lower than that of the first region.

摘要翻译： 场效应晶体管包括形成在衬底上的第一半导体层和第二半导体层。 第一半导体层具有设置为包含非导电杂质的隔离区域的含有区域和不含非导电杂质的非含有区域。 第一区域由容纳区域和非含有区域之间的界面的一部分的附近限定，界面的部分在栅电极下方，包括界面部分的附近包含在包含 地区。 第二半导体层包括位于第一区域正上方的第二区域。 第二区域的非导电性杂质的浓度低于第一区域的浓度。

公开(公告)号：US20110012173A1

公开(公告)日：2011-01-20

申请号：US12867427

申请日：2009-01-23

申请人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/12

CPC分类号： H01L29/7786 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/432 ,  H01L29/66462

摘要： A semiconductor device includes an undoped GaN layer (103) formed on a substrate (101), an undoped AlGaN layer (104) formed on the undoped GaN layer (103) and having a band gap energy larger than that of the undoped GaN layer (103), a p-type AlGaN layer (105) and a high-concentration p-type GaN layer (106) formed on the undoped AlGaN layer (104), and an n-type AlGaN layer (107) formed on the high-concentration p-type GaN layer (106). A gate electrode (112) which makes ohmic contact with the high-concentration p-type GaN layer (106) is formed on the high-concentration p-type GaN layer (106) in a region thereof exposed through an opening (107a) formed in the n-type AlGaN layer (107).

摘要翻译： 半导体器件包括形成在衬底（101）上的未掺杂的GaN层（103），形成在未掺杂的GaN层（103）上并且具有比未掺杂的GaN层的带隙能量大的带隙能量的未掺杂的AlGaN层（104） 103），形成在未掺杂的AlGaN层（104）上的p型AlGaN层（105）和高浓度p型GaN层（106）以及形成在高掺杂AlGaN层上的n型AlGaN层（107） 浓度p型GaN层（106）。 在高浓度p型GaN层（106）上形成与高浓度p型GaN层（106）欧姆接触的栅电极（112），其形成在通过形成的开口（107a）的部分露出的区域 在n型AlGaN层（107）中。

公开(公告)号：US08164115B2

公开(公告)日：2012-04-24

申请号：US13010238

申请日：2011-01-20

申请人： Masahiro Hikita ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Masahiro Hikita ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L21/337 ,  H01L21/335

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/66462

摘要： A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.

摘要翻译： 氮化物半导体器件包括：衬底; 形成在所述基板上的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更大的带隙能量的第二氮化物半导体层; 形成在所述第二氮化物半导体层上并且包括具有至少单层结构的p型氮化物半导体的第三氮化物半导体层; 形成在所述第三氮化物半导体层上的栅电极; 以及分别形成在位于栅电极两侧的区域中的源电极和漏电极。 所述第三氮化物半导体层的厚度比所述栅极电极侧的部分的厚度大。

公开(公告)号：US08101972B2

公开(公告)日：2012-01-24

申请号：US12912346

申请日：2010-10-26

申请人： Masahiro Hikita ,  Tetsuzo Ueda

发明人： Masahiro Hikita ,  Tetsuzo Ueda

IPC分类号： H01L29/66

CPC分类号： H01L29/2003 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/7786 ,  H01L29/808

摘要： A nitride semiconductor device includes: first through third nitride semiconductor layers formed in sequence over a substrate. The second nitride semiconductor layer has a band gap energy larger than that of the first nitride semiconductor layer. The third nitride semiconductor layer has an opening. A p-type fourth nitride semiconductor layer is formed so that the opening is filled therewith. A gate electrode is formed on the fourth nitride semiconductor layer.

摘要翻译： 氮化物半导体器件包括：顺序地在衬底上形成的第一至第三氮化物半导体层。 第二氮化物半导体层的带隙能量大于第一氮化物半导体层的带隙能量。 第三氮化物半导体层具有开口。 形成p型第四氮化物半导体层，使得开口被填充。 在第四氮化物半导体层上形成栅电极。

公开(公告)号：US08076698B2

公开(公告)日：2011-12-13

申请号：US11995040

申请日：2006-06-27

申请人： Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Masahiro Hikita ,  Hiroaki Ueno

发明人： Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Masahiro Hikita ,  Hiroaki Ueno

IPC分类号： H01L31/0328

CPC分类号： H01L29/739 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7786

摘要： In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.

摘要翻译： 在晶体管中，在蓝宝石衬底101上依次形成AlN缓冲层102，未掺杂的GaN层103，未掺杂的AlGaN层104，p型控制层105和p型接触层106。 晶体管还包括与p型接触层106欧姆接触的栅电极110以及设置在未掺杂的AlGaN层104上的源电极108和漏极109.通过向p型控制层105施加正电压 ，孔被注入到通道中以增加在通道中流动的电流。

公开(公告)号：US07576373B1

公开(公告)日：2009-08-18

申请号：US11595966

申请日：2006-11-13

申请人： Masahiro Hikita ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Masahiro Hikita ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L31/72

CPC分类号： H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/66462

摘要： An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a first p-AlGaN layer, a second p-AlGaN layer and a high concentration p-GaN layer are formed in this order on a substrate. A gate electrode establishes ohmic contact with the high concentration p-GaN layer. A source electrode and a drain electrode are formed on the undoped AlGaN layer. Two-dimensional electron gas generated at the interface between the undoped AlGaN layer and the undoped GaN layer and the first and second p-AlGaN layers form a pn junction in a gate region. The second p-AlGaN layer covers a SiN film in part.

摘要翻译： 在衬底上依次形成AlN缓冲层，未掺杂的GaN层，未掺杂的AlGaN层，第一p-AlGaN层，第二p-AlGaN层和高浓度p-GaN层。 栅电极与高浓度p-GaN层建立欧姆接触。 在未掺杂的AlGaN层上形成源电极和漏电极。 在未掺杂的AlGaN层和未掺杂的GaN层之间的界面处产生的二维电子气和第一和第二p-AlGaN层在栅极区域中形成pn结。 第二p-AlGaN层部分覆盖SiN膜。

公开(公告)号：US20080079023A1

公开(公告)日：2008-04-03

申请号：US11890480

申请日：2007-08-07

申请人： Masahiro Hikita ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Masahiro Hikita ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L21/337 ,  H01L21/335

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/66462

摘要： A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.

摘要翻译： 氮化物半导体器件包括：衬底; 形成在所述基板上的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更大的带隙能量的第二氮化物半导体层; 形成在所述第二氮化物半导体层上并且包括具有至少单层结构的p型氮化物半导体的第三氮化物半导体层; 形成在所述第三氮化物半导体层上的栅电极; 以及分别形成在位于栅电极两侧的区域中的源电极和漏电极。 所述第三氮化物半导体层的厚度比所述栅极电极侧的部分的厚度大。

公开(公告)号：US08748941B2

公开(公告)日：2014-06-10

申请号：US13372065

申请日：2012-02-13

申请人： Daisuke Shibata ,  Masahiro Hikita ,  Hidetoshi Ishida ,  Tetsuzo Ueda

发明人： Daisuke Shibata ,  Masahiro Hikita ,  Hidetoshi Ishida ,  Tetsuzo Ueda

IPC分类号： H01L29/66 ,  H01L29/20 ,  H01L29/423 ,  H01L29/872 ,  H01L29/778 ,  H01L29/417 ,  H01L29/06

CPC分类号： H01L29/7786 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/7787 ,  H01L29/872

摘要： A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semiconductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer 102 includes a first nitride semiconductor layer, a second nitride semiconductor layer, and a p-type third nitride semiconductor layer 124 sequentially formed on the substrate. The third nitride semiconductor layer contains p-type impurities, and is selectively formed between the first ohmic electrode and the Schottky electrode in contact with the Schottky electrode.

摘要翻译： 氮化物半导体器件包括形成在衬底上的半导体层，在半导体多层上彼此间隔开的第一欧姆电极和肖特基电极; 以及覆盖半导体多层的顶部的钝化膜。 半导体层叠体102包括顺序形成在基板上的第一氮化物半导体层，第二氮化物半导体层和p型第三氮化物半导体层124。 第三氮化物半导体层含有p型杂质，并且选择性地形成在与肖特基电极接触的第一欧姆电极和肖特基电极之间。

公开(公告)号：US20120146093A1

公开(公告)日：2012-06-14

申请号：US13372065

申请日：2012-02-13

申请人： Daisuke SHIBATA ,  Masahiro Hikita ,  Hidetoshi Ishida ,  Tetsuzo Ueda

发明人： Daisuke SHIBATA ,  Masahiro Hikita ,  Hidetoshi Ishida ,  Tetsuzo Ueda

IPC分类号： H01L29/78

CPC分类号： H01L29/7786 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/7787 ,  H01L29/872

摘要： A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semiconductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer 102 includes a first nitride semiconductor layer, a second nitride semiconductor layer, and a p-type third nitride semiconductor layer 124 sequentially formed on the substrate. The third nitride semiconductor layer contains p-type impurities, and is selectively formed between the first ohmic electrode and the Schottky electrode in contact with the Schottky electrode.

摘要翻译： 氮化物半导体器件包括形成在衬底上的半导体层，在半导体多层上彼此间隔开的第一欧姆电极和肖特基电极; 以及覆盖半导体多层的顶部的钝化膜。 半导体层叠体102包括顺序形成在基板上的第一氮化物半导体层，第二氮化物半导体层和p型第三氮化物半导体层124。 第三氮化物半导体层含有p型杂质，并且选择性地形成在与肖特基电极接触的第一欧姆电极和肖特基电极之间。