公开(公告)号：US07682983B2

公开(公告)日：2010-03-23

申请号：US11487587

申请日：2006-07-17

申请人： Hikaru Kokura ,  Kenji Nukui ,  Shinji Fukuta ,  Tadashi Oshima ,  Fukashi Harada ,  Tatsuro Kawabata

发明人： Hikaru Kokura ,  Kenji Nukui ,  Shinji Fukuta ,  Tadashi Oshima ,  Fukashi Harada ,  Tatsuro Kawabata

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31138

摘要： A manufacturing method of an electronic device, includes the steps of: implanting P (phosphorous) ions into a substrate semiconductor region made of Si or SiGe by using a resist as a mask; ashing the resist while it is heated in a vacuum environment; and taking out the substrate, the substrate being ashing processed so that a temperature of the substrate is equal to or less than 130° C.

摘要翻译： 电子器件的制造方法包括以下步骤：通过使用抗蚀剂作为掩模将P（磷）离子注入到由Si或SiGe制成的衬底半导体区域中; 当在真空环境中加热时，抗蚀剂灰化; 并且取出基板，将基板进行灰化处理，使得基板的温度等于或小于130℃。

公开(公告)号：US20070173066A1

公开(公告)日：2007-07-26

申请号：US11487587

申请日：2006-07-17

申请人： Hikaru Kokura ,  Kenji Nukui ,  Shinji Fukuta ,  Tadashi Oshima ,  Fukashi Harada ,  Tatsuro Kawabata

发明人： Hikaru Kokura ,  Kenji Nukui ,  Shinji Fukuta ,  Tadashi Oshima ,  Fukashi Harada ,  Tatsuro Kawabata

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31138

摘要： A manufacturing method of an electronic device, includes the steps of: implanting P (phosphorous) ions into a substrate semiconductor region made of Si or SiGe by using a resist as a mask; ashing the resist while it is heated in a vacuum environment; and taking out the substrate, the substrate being ashing processed so that a temperature of the substrate is equal to or less than 130° C.

摘要翻译： 电子器件的制造方法包括以下步骤：通过使用抗蚀剂作为掩模将P（磷）离子注入到由Si或SiGe制成的衬底半导体区域中; 当在真空环境中加热时，抗蚀剂灰化; 并且取出基板，将基板进行灰化处理，使得基板的温度等于或小于130℃。

公开(公告)号：US07416988B2

公开(公告)日：2008-08-26

申请号：US10991498

申请日：2004-11-19

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/28518 ,  H01L21/31116 ,  H01L21/76814 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636

摘要： A method of fabricating a semiconductor device includes the steps of modifying a damaged layer containing carbon and formed at a semiconductor surface by exposing the damaged layer to oxygen radicals to form a modified layer, and removing the modified layer by a wet etching process, wherein the modifying step is conducted by adding an active specie of an element that would obstruct formation of double bond between a Si atom and an oxygen atom by causing a chemical bond with Si atoms on the semiconductor surface.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：通过将损伤层暴露于氧自由基以形成改性层，并且通过湿法蚀刻工艺除去改性层，来修饰含碳的损伤层并形成在半导体表面，其中 通过在半导体表面上引入与Si原子的化学键，添加阻碍Si原子和氧原子之间的双键形成的元素的活性物质进行改性。

公开(公告)号：US20090308536A1

公开(公告)日：2009-12-17

申请号：US12545456

申请日：2009-08-21

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： C23F1/08

CPC分类号： H01L29/6656 ,  H01L22/12 ,  H01L29/6659 ,  H01L29/7833

摘要： A system for manufacturing a semiconductor device that has a gate electrode and a pair of diffusion layers formed in a semiconductor substrate on sides of the gate electrode, the system including structure for forming an insulating film and a gate electrode on a semiconductor substrate, obtaining a thickness of an affected layer formed in a surface of the semiconductor substrate, forming a pair of diffusion layers by injecting an impurity element into the semiconductor substrate in areas flanking the gate electrodes based on a predetermined injection parameter, performing activating heat treatment based on a predetermined heat treatment parameter, and deriving the injection parameter or heat treatment parameter in response to the obtained thickness of the affected layer such that the diffusion layers are set to a predetermined sheet resistance.

摘要翻译： 一种用于制造半导体器件的系统，该半导体器件具有在栅电极的侧面上形成在半导体衬底中的栅电极和一对扩散层，该系统包括用于在半导体衬底上形成绝缘膜和栅电极的结构， 在半导体衬底的表面中形成的受影响层的厚度，通过基于预定的注入参数，在栅电极的侧面的区域中将杂质元素注入到半导体衬底中，形成一对扩散层，根据预定的注入参数进行活化热处理 热处理参数，并且响应于获得的受影响层的厚度导出注入参数或热处理参数，使得扩散层被设定为预定的薄层电阻。

公开(公告)号：US20070026541A1

公开(公告)日：2007-02-01

申请号：US11245086

申请日：2005-10-07

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： H01L21/66

CPC分类号： H01L29/6656 ,  H01L22/12 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of manufacturing a semiconductor device, which has a gate electrode and a pair of diffusion layers formed in a semiconductor substrate on sides of the gate electrode, includes forming an insulating film and a gate electrode on a semiconductor substrate, obtaining a thickness of an affected layer formed in a surface of the semiconductor substrate, forming a pair of diffusion layers by injecting an impurity element into the semiconductor substrate in areas flanking the gate electrodes based on a predetermined injection parameter, performing activating heat treatment based on a predetermined heat treatment parameter, and a parameter deriving step provided between the obtaining step and the diffusion layer forming step, the parameter deriving step deriving the injection parameter or heat treatment parameter in response to the obtained thickness of the affected layer such that the diffusion layers are set to a predetermined sheet resistance.

摘要翻译： 一种制造半导体器件的方法，该半导体器件在栅电极的侧面上形成有半导体衬底中的栅电极和一对扩散层，包括在半导体衬底上形成绝缘膜和栅电极， 在半导体衬底的表面上形成的受影响层，通过基于预定的注入参数，在栅电极侧面的区域中将杂质元素注入到半导体衬底中，形成一对扩散层，基于预定的热处理参数进行活化热处理 以及在所述获取步骤和所述扩散层形成步骤之间提供的参数导出步骤，所述参数导出步骤响应于所获得的所述受影响层的厚度导出所述注入参数或热处理参数，使得所述扩散层被设定为预定的 薄片电阻。

公开(公告)号：US08741760B2

公开(公告)日：2014-06-03

申请号：US13494728

申请日：2012-06-12

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： H01L21/28

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L29/66825

摘要： A semiconductor device has a semiconductor substrate, a plurality of first conductive patterns, a second conductive pattern having a top surface of which stepwisely or gradually decreases in height in a direction from a side facing the first conductive pattern toward an opposite side, a first insulation film formed over the plurality of first conductive patterns and the second conductive pattern, and a third conductive pattern formed over the first insulation film.

摘要翻译： 半导体器件具有半导体衬底，多个第一导电图案，第二导电图案，其顶表面在从面向第一导电图案的一侧向相对侧的方向上高度逐渐或逐渐降低，第一绝缘层 形成在所述多个第一导电图案和所述第二导电图案上的膜，以及形成在所述第一绝缘膜上的第三导电图案。

公开(公告)号：US20120258586A1

公开(公告)日：2012-10-11

申请号：US13494728

申请日：2012-06-12

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： H01L21/283

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L29/66825

摘要： A semiconductor device has a semiconductor substrate, a plurality of first conductive patterns, a second conductive pattern having a top surface of which stepwisely or gradually decreases in height in a direction from a side facing the first conductive pattern toward an opposite side, a first insulation film formed over the plurality of first conductive patterns and the second conductive pattern, and a third conductive pattern formed over the first insulation film.

摘要翻译： 半导体器件具有半导体衬底，多个第一导电图案，第二导电图案，其顶表面在从面向第一导电图案的一侧向相对侧的方向上高度逐渐或逐渐降低，第一绝缘层 形成在所述多个第一导电图案和所述第二导电图案上的膜，以及形成在所述第一绝缘膜上的第三导电图案。

公开(公告)号：US20090215243A1

公开(公告)日：2009-08-27

申请号：US12369859

申请日：2009-02-12

申请人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

发明人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

IPC分类号： H01L21/762

CPC分类号： H01L21/76224 ,  H01L21/823481 ,  H01L27/1052 ,  H01L27/11521

摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

摘要翻译： 制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能 绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜 含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

公开(公告)号：US20080274607A1

公开(公告)日：2008-11-06

申请号：US12213759

申请日：2008-06-24

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： H01L21/28

CPC分类号： H01L21/28518 ,  H01L21/31116 ,  H01L21/76814 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636

摘要： A method of fabricating a semiconductor device includes the steps of modifying a damaged layer containing carbon and formed at a semiconductor surface by exposing the damaged layer to oxygen radicals to form a modified layer, and removing the modified layer by a wet etching process, wherein the modifying step is conducted by adding an active specie of an element that would obstruct formation of double bond between a Si atom and an oxygen atom by causing a chemical bond with Si atoms on the semiconductor surface.

公开(公告)号：US08206550B2

公开(公告)日：2012-06-26

申请号：US12545456

申请日：2009-08-21

申请人： Hikaru Kokura

发明人： Hikaru Kokura

IPC分类号： H01L21/00

CPC分类号： H01L29/6656 ,  H01L22/12 ,  H01L29/6659 ,  H01L29/7833

摘要： A system for manufacturing a semiconductor device that has a gate electrode and a pair of diffusion layers formed in a semiconductor substrate on sides of the gate electrode, the system including structure for forming an insulating film and a gate electrode on a semiconductor substrate, obtaining a thickness of an affected layer formed in a surface of the semiconductor substrate, forming a pair of diffusion layers by injecting an impurity element into the semiconductor substrate in areas flanking the gate electrodes based on a predetermined injection parameter, performing activating heat treatment based on a predetermined heat treatment parameter, and deriving the injection parameter or heat treatment parameter in response to the obtained thickness of the affected layer such that the diffusion layers are set to a predetermined sheet resistance.

摘要翻译： 一种用于制造半导体器件的系统，该半导体器件具有在栅电极的侧面上形成在半导体衬底中的栅电极和一对扩散层，该系统包括用于在半导体衬底上形成绝缘膜和栅电极的结构， 在半导体衬底的表面中形成的受影响层的厚度，通过基于预定的注入参数，在栅电极的侧面的区域中将杂质元素注入到半导体衬底中，形成一对扩散层，根据预定的注入参数进行活化热处理 热处理参数，并且响应于获得的受影响层的厚度导出注入参数或热处理参数，使得扩散层被设定为预定的薄层电阻。