公开(公告)号：US20090215243A1

公开(公告)日：2009-08-27

申请号：US12369859

申请日：2009-02-12

申请人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

发明人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

IPC分类号： H01L21/762

CPC分类号： H01L21/76224 ,  H01L21/823481 ,  H01L27/1052 ,  H01L27/11521

摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

摘要翻译： 制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能 绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜 含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

公开(公告)号：US08518795B2

公开(公告)日：2013-08-27

申请号：US13455633

申请日：2012-04-25

申请人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

发明人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/823481 ,  H01L27/1052 ,  H01L27/11521

摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

摘要翻译： 制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能 绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜 含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

公开(公告)号：US08173514B2

公开(公告)日：2012-05-08

申请号：US12369859

申请日：2009-02-12

申请人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

发明人： Jusuke Ogura ,  Hikaru Kokura ,  Hideyuki Kojima ,  Toru Anezaki ,  Hiroyuki Ogawa ,  Junichi Ariyoshi

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/823481 ,  H01L27/1052 ,  H01L27/11521

摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

摘要翻译： 制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能 绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜 含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

公开(公告)号：US20060220144A1

公开(公告)日：2006-10-05

申请号：US11220628

申请日：2005-09-08

申请人： Toru Anezaki ,  Jusuke Ogura ,  Taiji Ema

发明人： Toru Anezaki ,  Jusuke Ogura ,  Taiji Ema

IPC分类号： H01L29/76

CPC分类号： H01L21/76229 ,  H01L21/76227 ,  H01L21/823878 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11546

摘要： A semiconductor device includes: a semiconductor substrate; and STIs formed in the semiconductor substrate and defining a high voltage transistor area and a low voltage transistor area, the STIs including: a first STI with a first liner including a thermal oxide film and not including a nitride film and surrounding at least a portion of the high voltage transistor area; and a second STI with a second liner of a lamination of a thermal oxide film and a nitride film and surrounding the low voltage transistor area.

摘要翻译： 半导体器件包括：半导体衬底; 以及形成在所述半导体衬底中并且限定高压晶体管区域和低电压晶体管区域的STI，所述STI包括：具有包括热氧化膜并且不包括氮化物膜并且包围至少一部分 高压晶体管面积; 以及第二STI，其具有热氧化膜和氮化物膜的叠层的第二衬垫，并围绕所述低电压晶体管区域。

公开(公告)号：US07199426B2

公开(公告)日：2007-04-03

申请号：US11076063

申请日：2005-03-10

申请人： Jusuke Ogura ,  Hiroyuki Ogawa ,  Tatsuo Chijimatsu

发明人： Jusuke Ogura ,  Hiroyuki Ogawa ,  Tatsuo Chijimatsu

IPC分类号： H01L29/72

CPC分类号： H01L27/11568 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/4238 ,  H01L29/792

摘要： The nonvolatile semiconductor memory device comprises a channel region formed in a semiconductor substrate, a gate electrode formed over the channel region with a charge retaining insulating film interposed therebetween, a first pair of source/drain regions arranged in a first direction with the channel region formed therebetween, and a second pair of source/drain regions arranged in a second direction intersecting the first direction with the channel region formed therebetween. The channel region and the gate electrode are common between a first memory cell transistor including the first pair of source/drain regions and a second memory cell transistor including the second pair of source/drain regions.

摘要翻译： 非易失性半导体存储器件包括形成在半导体衬底中的沟道区，栅电极，形成在沟道区上，其间具有电荷保持绝缘膜，第一对源极/漏极区沿第一方向排列，形成沟道区 以及沿与第一方向相交的第二方向布置的第二对源/漏区，其间形成有沟道区。 沟道区域和栅电极在包括第一对源极/漏极区域的第一存储单元晶体管和包括第二对源极/漏极区域的第二存储单元晶体管之间是共同的。

公开(公告)号：US20060081915A1

公开(公告)日：2006-04-20

申请号：US11076063

申请日：2005-03-10

申请人： Jusuke Ogura ,  Hiroyuki Ogawa ,  Tatsuo Chijimatsu

发明人： Jusuke Ogura ,  Hiroyuki Ogawa ,  Tatsuo Chijimatsu

IPC分类号： H01L29/788

CPC分类号： H01L27/11568 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/4238 ,  H01L29/792

摘要： The nonvolatile semiconductor memory device comprises a channel region formed in a semiconductor substrate, a gate electrode formed over the channel region with a charge retaining insulating film interposed therebetween, a first pair of source/drain regions arranged in a first direction with the channel region formed therebetween, and a second pair of source/drain regions arranged in a second direction intersecting the first direction with the channel region formed therebetween. The channel region and the gate electrode are common between a first memory cell transistor including the first pair of source/drain regions and a second memory cell transistor including the second pair of source/drain regions.

摘要翻译： 非易失性半导体存储器件包括形成在半导体衬底中的沟道区，栅电极，形成在沟道区上，其间具有电荷保持绝缘膜，第一对源极/漏极区沿第一方向排列，形成沟道区 以及沿与第一方向相交的第二方向布置的第二对源/漏区，其间形成有沟道区。 沟道区域和栅电极在包括第一对源极/漏极区域的第一存储单元晶体管和包括第二对源极/漏极区域的第二存储单元晶体管之间是共同的。

公开(公告)号：US06479411B1

公开(公告)日：2002-11-12

申请号：US09532347

申请日：2000-03-21

申请人： Angela T. Hui ,  Jusuke Ogura

发明人： Angela T. Hui ,  Jusuke Ogura

IPC分类号： H01L21311

CPC分类号： H01L21/02238 ,  H01L21/02255 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31662 ,  Y10S438/906 ,  Y10S438/942 ,  Y10S438/948

摘要： A method for forming high quality multiple thickness oxide layers having different thicknesses by eliminating descum induced defects. The method includes forming an oxide layer, masking the oxide layer with a photoresist layer, and developing the photoresist layer to expose at least one region of the oxide layer. The substrate is then heated and descummed to remove any residue resulting from developing the photoresist. Alternatively, the photoresist layer may be cured prior to heating and descumming the substrate. The oxide layer is then etched, and the remaining photoresist is stripped before another layer of oxide is grown on the substrate.

摘要翻译： 一种用于通过消除除去所引起的缺陷来形成具有不同厚度的高质量多层氧化物层的方法。 该方法包括形成氧化物层，用光致抗蚀剂层掩蔽氧化物层，以及显影光致抗蚀剂层以暴露氧化物层的至少一个区域。 然后将基材加热除去以除去由显影光致抗蚀剂产生的残留物。 或者，光致抗蚀剂层可以在加热和除去基板之前固化。 然后蚀刻氧化物层，并且在衬底上生长另一层氧化物之前剥离剩余的光致抗蚀剂。

公开(公告)号：US06461973B1

公开(公告)日：2002-10-08

申请号：US09535256

申请日：2000-03-23

申请人： Angela T. Hui ,  Jusuke Ogura

发明人： Angela T. Hui ,  Jusuke Ogura

IPC分类号： H01L21302

CPC分类号： H01L21/0206 ,  H01L21/28273 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31662 ,  H01L21/823462

摘要： A method for forming high quality oxide layers having different thicknesses by eliminating descum induced defects is disclosed. A semiconductor substrate is subjected to reactive ion etching. The semiconductor substrate includes a wafer, an oxide layer on the wafer, a developed photoresist mask on the oxide layer. The oxide layer is then etched, and the remaining photoresist is stripped before another layer of oxide is grown on the substrate.

公开(公告)号：US20100270623A1

公开(公告)日：2010-10-28

申请号：US12761516

申请日：2010-04-16

申请人： Tomoyuki Kirimura ,  Jusuke Ogura

发明人： Tomoyuki Kirimura ,  Jusuke Ogura

IPC分类号： H01L27/092 ,  H01L21/8238

CPC分类号： H01L21/823871 ,  H01L21/823807 ,  H01L29/7843

摘要： A semiconductor device fabrication method including: forming a gate conductor including a gate for a transistor in the first region, and a gate for a transistor in the second region, and a first film over a first stress film for covering the transistors; etching the first film from the second region by using a mask layer and etching the first film under the mask layer in the direction parallel to the surface of the semiconductor substrate by a first width from an edge of the first mask layer, and the first stress film from the second region; forming a second stress film covering the first stress film and the first film; etching the second stress film so that a portion of the second stress film overlaps a portion of the first stress film and a portion of the first film; and forming a contact hole connected with the gate conductor.

摘要翻译： 一种半导体器件制造方法，包括：形成包括第一区域中的晶体管的栅极和第二区域中的晶体管的栅极的栅极导体，以及用于覆盖晶体管的第一应力膜上的第一膜; 通过使用掩模层从所述第二区域蚀刻所述第一膜，并且在所述掩模层的下面沿着与所述半导体衬底的表面平行的方向从所述第一掩模层的边缘以第一宽度蚀刻所述第一膜，并且所述第一应力 第二区电影; 形成覆盖所述第一应力膜和所述第一膜的第二应力膜; 蚀刻第二应力膜，使得第二应力膜的一部分与第一应力膜的一部分和第一膜的一部分重叠; 并形成与栅极导体连接的接触孔。

公开(公告)号：US07265014B1

公开(公告)日：2007-09-04

申请号：US10799413

申请日：2004-03-12

申请人： Angela T. Hui ,  Jusuke Ogura ,  Yider Wu

发明人： Angela T. Hui ,  Jusuke Ogura ,  Yider Wu

IPC分类号： H01L21/764 ,  H01L29/00

CPC分类号： H01L21/76224

摘要： A method and device for avoiding oxide gouging in shallow trench isolation (STI) regions of a semiconductor device. A trench may be etched in an STI region and filled with insulating material. An anti-reflective coating (ARC) layer may be deposited over the STI region and extend beyond the boundaries of the STI region. A portion of the ARC layer may be etched leaving a remaining portion of the ARC layer over the STI region and extending beyond the boundaries of the STI region. A protective cap may be deposited to cover the remaining portion of the ARC layer as well as the insulating material. The protective cap may be etched back to expose the ARC layer. However, the protective cap still covers and protects the insulating material. By providing a protective cap that covers the insulating material, gouging of the insulating material in STI regions may be avoided.

摘要翻译： 一种用于避免半导体器件的浅沟槽隔离（STI）区域中的氧化物气刨的方法和装置。 可以在STI区域中蚀刻沟槽并填充绝缘材料。 抗反射涂层（ARC）层可以沉积在STI区域上并延伸超出STI区域的边界。 可以蚀刻ARC层的一部分，留下ARC层的剩余部分超过STI区域并延伸超出STI区域的边界。 可以沉积保护盖以覆盖ARC层的剩余部分以及绝缘材料。 可以将保护盖回蚀以暴露ARC层。 然而，保护盖仍然覆盖并保护绝缘材料。 通过提供覆盖绝缘材料的保护帽，可以避免STI区域中的绝缘材料的气刨。