公开(公告)号：US06583453B2

公开(公告)日：2003-06-24

申请号：US10012219

申请日：2001-11-06

申请人： Hirotsugu Honda ,  Masafumi Doi

发明人： Hirotsugu Honda ,  Masafumi Doi

IPC分类号： H01L2974

CPC分类号： H01L21/76202 ,  H01L21/761

摘要： A semiconductor device providing an improved effect of suppressing variation with time of reverse breakdown voltage applied to PN junction, particularly, a voltage-regulator device, is provided. The semiconductor device includes an impurity diffusion layer 15 formed on a surface of a certain-conductivity-type semiconductor substrate or well, the impurity diffusion layer having a conductivity opposite to that of the semiconductor substrate or well, and a device separating insulation film 12 formed at a distance from the impurity diffusion layer, and a distance between an end of the impurity diffusion layer and an end of the device separating insulation film is defined to be not less than 1.2 &mgr;m.

摘要翻译： 提供一种半导体器件，其提供抑制施加到PN结的反向击穿电压随时间变化的改进效果，特别是电压调节器装置。 半导体器件包括形成在特定导电型半导体衬底或阱的表面上的杂质扩散层15，该杂质扩散层具有与半导体衬底或阱的导电性相反的导电性，以及形成的器件分离绝缘膜12 在距离杂质扩散层一定距离处，并且杂质扩散层的端部与器件分离绝缘膜的端部之间的距离被限定为不小于1.2μm。

公开(公告)号：US06657893B2

公开(公告)日：2003-12-02

申请号：US10050965

申请日：2002-01-22

申请人： Keita Takahashi ,  Masafumi Doi ,  Hiroyuki Doi ,  Nobuyuki Tamura ,  Yasushi Okuda

发明人： Keita Takahashi ,  Masafumi Doi ,  Hiroyuki Doi ,  Nobuyuki Tamura ,  Yasushi Okuda

IPC分类号： G11C1604

CPC分类号： G11C16/0416 ,  G11C16/0433 ,  H01L27/115

摘要： A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage. Improvement of reliability and rewrite and read operations at respective lower voltages are realized for a nonvolatile semiconductor memory device, in which a memory cell includes a floating gate electrode and a control gate electrode.

公开(公告)号：US4182411A

公开(公告)日：1980-01-08

申请号：US750909

申请日：1976-12-15

申请人： Hiroyuki Sumitomo ,  Katsutoshi Fukami ,  Kazuyuki Kobayashi ,  Masafumi Doi ,  Kenzo Kawanishi ,  Keido Yoshida

发明人： Hiroyuki Sumitomo ,  Katsutoshi Fukami ,  Kazuyuki Kobayashi ,  Masafumi Doi ,  Kenzo Kawanishi ,  Keido Yoshida

IPC分类号： F28B1/02 ,  F28B9/08 ,  F28F3/08 ,  F28F13/04

CPC分类号： F28F3/046 ,  F28B1/02 ,  F28B9/08 ,  F28F13/04 ,  F28F3/083 ,  Y10S165/185 ,  Y10S165/906

摘要： A condenser having heat transmitting surfaces, which comprises two types of heat transmitting plates alternately arranged side by side to define alternate passages for cooling liquid and steam so that the steam is condensed on the heat transmitting surfaces on the steam passage side. The heat transmitting surfaces are formed with grooves and ridges which are recessed in and raised above the base surface, thereby providing a condensate discharging mechanism comprising vertical grooves and inclined grooves for each given region on the condensating and heat transmitting surfaces, and longitudinal grooves are formed between the inclined grooves of said condensate discharging mechanisms.

摘要翻译： 一种具有传热面的冷凝器，包括并排交替布置的两种类型的传热板，以限定用于冷却液体和蒸汽的交替通道，使得蒸汽在蒸汽通道侧的传热表面上冷凝。 传热面形成有在基面上凹陷并凸起的凹槽和脊，从而为冷凝和传热表面上的每个给定区域提供包括垂直槽和倾斜槽的冷凝物排出机构，并且形成纵向槽 在所述冷凝物排放机构的倾斜槽之间。

公开(公告)号：US06377490B1

公开(公告)日：2002-04-23

申请号：US09677844

申请日：2000-10-03

申请人： Keita Takahashi ,  Masafumi Doi ,  Hiroyuki Doi ,  Nobuyuki Tamura ,  Yasushi Okuda

发明人： Keita Takahashi ,  Masafumi Doi ,  Hiroyuki Doi ,  Nobuyuki Tamura ,  Yasushi Okuda

IPC分类号： G11C1604

CPC分类号： G11C16/0416 ,  G11C16/0433 ,  H01L27/115

摘要： A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower volt age. Also, since the select transistor is provided, reading c an also be performed at a lower voltage. Improvement of reliability and rewrite and read operations at respective lower voltages are realized for a nonvolatile semiconductor memory device, in which a memory cell includes a floating gate electrode and a control gate electrode.

摘要翻译： 存储晶体管和选择晶体管并排地设置在其源极/漏极扩散层之间的半导体衬底上，介于其间的中间扩散层。 存储晶体管包括：栅极绝缘膜，具有允许隧穿电流通过的厚度; 浮栅电极; 电极间绝缘膜; 和控制栅电极。 选择晶体管包括栅极绝缘膜和选择栅电极。 在从浮栅电极移入和注入电子期间，利用允许电子通过浮栅电极下的栅极绝缘膜的隧穿电流。 结果，可以获得更高的可靠性并且可以在较低的电压时间进行重写。 此外，由于提供了选择晶体管，因此也可以在较低的电压下进行读取。 对于其中存储单元包括浮置栅电极和控制栅电极的非易失性半导体存储器件，实现了在各自的较低电压下的可靠性的改善和重写和读取操作。

公开(公告)号：US4314605A

公开(公告)日：1982-02-09

申请号：US770562

申请日：1977-02-22

申请人： Hiroyuki Sumitomo ,  Masafumi Doi ,  Kazuyuki Kobayashi ,  Katsutoshi Fukami ,  Kenzo Kawanishi

发明人： Hiroyuki Sumitomo ,  Masafumi Doi ,  Kazuyuki Kobayashi ,  Katsutoshi Fukami ,  Kenzo Kawanishi

IPC分类号： F28B1/00 ,  F28B9/08 ,  F28F3/04 ,  F28F13/04

CPC分类号： F28F13/04 ,  F28B1/00 ,  F28B9/08 ,  F28F3/04 ,  Y10S165/185

摘要： A condenser characterized in that a pair of heat transmitting surfaces having opposed longitudinal grooves are arranged with the ridges of the longitudinal grooves contacted with or closely adjacent to each other to define steam passageways by said opposed longitudinal grooves so that the condensate in the opposed longitudinal grooves is collected in the contacted regions or between the closely adjacent regions by surface tension and allowed to flow down.

摘要翻译： 一种冷凝器，其特征在于，具有相对的纵向槽的一对传热表面布置，所述纵向槽的脊彼此接触或紧密相邻，以限定由所述相对的纵向槽形成的蒸汽通道，使得相对的纵向槽 通过表面张力收集在接触区域或紧邻区域之间并允许其向下流动。

公开(公告)号：US06169307A

公开(公告)日：2001-01-02

申请号：US09206560

申请日：1998-12-08

申请人： Keita Takahashi ,  Masafumi Doi ,  Hiroyuki Doi ,  Nobuyuki Tamura ,  Yasushi Okuda

发明人： Keita Takahashi ,  Masafumi Doi ,  Hiroyuki Doi ,  Nobuyuki Tamura ,  Yasushi Okuda

IPC分类号： G01L29788

CPC分类号： G11C16/0416 ,  G11C16/0433 ,  H01L27/115

摘要： A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage. Improvement of reliability and rewrite and read operations at respective lower voltages are realized for a nonvolatile semiconductor memory device, in which a memory cell includes a floating gate electrode and a control gate electrode.

摘要翻译： 存储晶体管和选择晶体管并排地设置在其源极/漏极扩散层之间的半导体衬底上，介于其间的中间扩散层。 存储晶体管包括：栅极绝缘膜，具有允许隧穿电流通过的厚度; 浮栅电极; 电极间绝缘膜; 和控制栅电极。 选择晶体管包括栅极绝缘膜和选择栅电极。 在从浮栅电极移入和注入电子期间，利用允许电子通过浮栅电极下的栅极绝缘膜的隧穿电流。 结果，可以获得更高的可靠性，并且可以在较低的电压下进行重写。 此外，由于提供了选择晶体管，所以也可以在较低的电压下执行读取。 对于其中存储单元包括浮置栅电极和控制栅电极的非易失性半导体存储器件，实现了在各自的较低电压下的可靠性的改善和重写和读取操作。