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公开(公告)号:US20100237926A1
公开(公告)日:2010-09-23
申请号:US12724518
申请日:2010-03-16
Applicant: Hiroyuki Kikuta , Yuichi Ohkubo , Kazuyoshi Asakawa
Inventor: Hiroyuki Kikuta , Yuichi Ohkubo , Kazuyoshi Asakawa
IPC: G06G7/14
CPC classification number: G06G7/14
Abstract: A voltage generating circuit including first and second voltage sources, and a subtracting circuit. The subtraction circuit is configured as a differential amplifier including an op-amp and four resistors, with an inverting input terminal of the op-amp connected to the second voltage source via a first resistor, a second resistor connected between the inverting input terminal and an output terminal of the op-amp, a non-inverting input terminal of the op-amp connected to the first voltage source via a third resistor of the same size as the second resistor, the non-inverting input terminal of the op-amp connected to a reference potential terminal via a fourth resistor of the same size as the first resistor, the first voltage from the first voltage source and the second voltage from the second voltage source inputted to the subtracting circuit, and the subtracting circuit outputting a third voltage having a positive temperature coefficient.
Abstract translation: 包括第一和第二电压源的电压产生电路和减法电路。 减法电路被配置为包括运算放大器和四个电阻器的差分放大器,其中运算放大器的反相输入端经由第一电阻器连接到第二电压源,第二电阻器连接在反相输入端子和 运算放大器的输出端子,运算放大器的同相输入端子通过与第二电阻器相同尺寸的第三电阻器连接到第一电压源,运算放大器的非反相输入端子连接 经由与第一电阻器相同尺寸的第四电阻器连接到参考电位端子,来自第一电压源的第一电压和来自第二电压源的第二电压输入到减法电路,并且减法电路输出具有 正温度系数。
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公开(公告)号:US20100237818A1
公开(公告)日:2010-09-23
申请号:US12722172
申请日:2010-03-11
Applicant: Yuichi Ohkubo , Hiroyuki Kikuta , Norihiro Kawagishi , Kazuyoshi Asakawa
Inventor: Yuichi Ohkubo , Hiroyuki Kikuta , Norihiro Kawagishi , Kazuyoshi Asakawa
IPC: H02K29/08
Abstract: A driving circuit feeds driving current to a coil in a brushless motor, and feeds bias current to a Hall element that senses the rotational position of the motor. The driving current and bias current are supplied from the same power supply, but the bias current passes through a load element that reduces power dissipation by the Hall bias circuit by causing some of the power to be dissipated by the load element instead. The Hall bias circuit can therefore be combined with the other driving circuitry into a single integrated circuit, even if the brushless motor is driven at a comparatively high voltage.
Abstract translation: 驱动电路将驱动电流馈送到无刷电动机中的线圈,并将偏置电流馈送到感测电动机的旋转位置的霍尔元件。 驱动电流和偏置电流由相同的电源供电,但是偏置电流通过负载元件,通过使负载元件消耗一些功率来降低霍尔偏置电路的功率消耗。 因此,即使在较高电压下驱动无刷电动机,霍尔偏置电路也可以与其他驱动电路组合成单个集成电路。
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公开(公告)号:US08390222B2
公开(公告)日:2013-03-05
申请号:US12720830
申请日:2010-03-10
Applicant: Kunio Seki , Kazutaka Inoue , Hiroyuki Kikuta , Yuichi Ohkubo
Inventor: Kunio Seki , Kazutaka Inoue , Hiroyuki Kikuta , Yuichi Ohkubo
CPC classification number: H02P6/085 , H02M1/32 , H02M7/5387 , H02P6/34 , H02P29/0241
Abstract: The present disclosure provides a brushless motor driving circuit capable of clamping an output voltage at a proper voltage, even when a power source voltage changes. Namely, a pre-driver circuit generates a voltage for driving a brushless motor from a source voltage by turning on/off first and second PMOS transistors and first and second NMOS transistors in an H bridge circuit of a drive voltage generating circuit, and applies the voltage to a coil of the brushless motor. A first clamp circuit turns on/off the first NMOS transistor on the ground side so that the output voltage at a first output terminal becomes equal to or lower than the source voltage. A second clamp circuit turns on/off the second NMOS transistor on the ground side so that output voltage at a second output terminal becomes equal to or lower than the source voltage.
Abstract translation: 本发明提供一种能够将输出电压钳位在适当电压下的无刷电动机驱动电路,即使电源电压变化。 也就是说,预驱动器电路通过在驱动电压产生电路的H桥电路中接通/关闭第一和第二PMOS晶体管以及第一和第二NMOS晶体管,从源极电压产生用于驱动无刷电动机的电压, 电压到无刷电机的线圈。 第一钳位电路接地/关断接地侧的第一NMOS晶体管,使得第一输出端子处的输出电压变得等于或低于源极电压。 第二钳位电路在接地侧接通/关断第二NMOS晶体管,使得第二输出端子处的输出电压变得等于或低于源极电压。
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公开(公告)号:US20100237813A1
公开(公告)日:2010-09-23
申请号:US12719525
申请日:2010-03-08
Applicant: Kunio Seki , Kazutaka Inoue , Hiroyuki Kikuta , Yuichi Ohkubo
Inventor: Kunio Seki , Kazutaka Inoue , Hiroyuki Kikuta , Yuichi Ohkubo
IPC: H02P6/14
Abstract: A brushless motor driving apparatus that includes a rotation signal output component, a half-cycle signal generating component, a plurality of counters, and a duty control signal generating component is provided. The plurality of counters, each of which uses a different bit number to count, repeatedly resets a count value and restarts a count operation for every bit number, resets a count value together with rising or falling of a half-cycle signal, and outputs a pulse signal which is inverted for every reset that occurs while the count operation is being performed. The duty control signal generating component generates a duty control signal to determine a duty ratio of a control signal to control driving of a single-phase brushless motor, based on at least two pulse signals selected from the pulse signals output from the plurality of counters.
Abstract translation: 提供一种包括旋转信号输出部件,半周期信号生成部件,多个计数器和占空比控制信号生成部件的无刷电动机驱动装置。 多个计数器中的每一个使用不同的位数进行计数,重复复位计数值并重新开始每个位数的计数操作,与半周期信号的上升或下降一起复位计数值,并输出一个 脉冲信号对于在执行计数操作时发生的每个复位而被反转。 占空比控制信号产生部件基于从多个计数器输出的脉冲信号中选择的至少两个脉冲信号,产生占空比控制信号,以确定用于控制单相无刷电动机的驱动的控制信号的占空比。
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公开(公告)号:US20100237897A1
公开(公告)日:2010-09-23
申请号:US12724715
申请日:2010-03-16
Applicant: Hiroyuki Kikuta , Norihiro Kawagishi , Yuichi Ohkubo
Inventor: Hiroyuki Kikuta , Norihiro Kawagishi , Yuichi Ohkubo
IPC: G01R31/36
CPC classification number: H02M3/33507 , G01R19/165 , G01R31/40
Abstract: An overcurrent detecting circuit includes a comparison transistor, a constant current source circuit, and a comparison circuit. The comparison transistor includes a gate and a drain respectively connected to a gate and a drain of a main transistor provided in a power circuit. The comparison transistor is used for comparison with the main transistor when a voltage higher than a power supply voltage is applied to the gate of the main transistor and the gate of the comparison transistor during the operation of the power circuit. The constant current source circuit generates a constant current and supplies the constant current to the comparison transistor. The comparison circuit compares a source voltage of the comparison transistor with a source voltage of the main transistor and outputs a voltage indicating the comparison result.
Abstract translation: 过电流检测电路包括比较晶体管,恒流源电路和比较电路。 比较晶体管包括分别连接到设置在电源电路中的主晶体管的栅极和漏极的栅极和漏极。 比较晶体管用于在电源电路的操作期间将高于电源电压的电压施加到主晶体管的栅极和比较晶体管的栅极时与主晶体管进行比较。 恒流源电路产生恒定电流并将恒定电流提供给比较晶体管。 比较电路将比较晶体管的源极电压与主晶体管的源极电压进行比较,并输出表示比较结果的电压。
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公开(公告)号:US20100237816A1
公开(公告)日:2010-09-23
申请号:US12720830
申请日:2010-03-10
Applicant: Kunio Seki , Kazutaka Inoue , Hiroyuki Kikuta , Yuichi Ohkubo
Inventor: Kunio Seki , Kazutaka Inoue , Hiroyuki Kikuta , Yuichi Ohkubo
IPC: H02P6/14
CPC classification number: H02P6/085 , H02M1/32 , H02M7/5387 , H02P6/34 , H02P29/0241
Abstract: The present disclosure provides a brushless motor driving circuit capable of clamping an output voltage at a proper voltage, even when a power source voltage changes. Namely, a pre-driver circuit generates a voltage for driving a brushless motor from a source voltage by turning on/off first and second PMOS transistors and first and second NMOS transistors in an H bridge circuit of a drive voltage generating circuit, and applies the voltage to a coil of the brushless motor. A first clamp circuit turns on/off the first NMOS transistor on the ground side so that the output voltage at a first output terminal becomes equal to or lower than the source voltage. A second clamp circuit turns on/off the second NMOS transistor on the ground side so that output voltage at a second output terminal becomes equal to or lower than the source voltage.
Abstract translation: 本发明提供一种能够将输出电压钳位在适当电压下的无刷电动机驱动电路,即使电源电压变化。 也就是说,预驱动器电路通过在驱动电压产生电路的H桥电路中接通/关闭第一和第二PMOS晶体管以及第一和第二NMOS晶体管,从源极电压产生用于驱动无刷电动机的电压, 电压到无刷电机的线圈。 第一钳位电路接地/关断接地侧的第一NMOS晶体管,使得第一输出端子处的输出电压变得等于或低于源极电压。 第二钳位电路在接地侧接通/关断第二NMOS晶体管,使得第二输出端子处的输出电压变得等于或低于源极电压。
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公开(公告)号:US5309440A
公开(公告)日:1994-05-03
申请号:US940040
申请日:1992-09-03
Applicant: Hajime Nakamura , Hiroyuki Kikuta , Fumio Watanabe , Masanobu Fujioka
Inventor: Hajime Nakamura , Hiroyuki Kikuta , Fumio Watanabe , Masanobu Fujioka
CPC classification number: H04Q11/0471 , H04J3/0682 , H04Q2213/194 , H04Q2213/211 , H04Q2213/216 , H04Q2213/36
Abstract: An ISDN-user-network interface system comprising an interface buffer and an interface adapter. The interface buffer provided between an ISDN network terminal equipment and a terminal equipment to receive an up-signal frame transmitted from said terminal equipment to said network terminal equipment, to store said up-signal frame, and to transmit said stored up-signal frame at a timing when said network terminal equipment is capable of detecting the synchronization of said up-signal frame. The interface adapter provided between said ISDN network terminal equipment and said terminal equipment, to receive an up-signal frame transmitted from said terminal equipment to said network terminal equipment, to detect D-channel bits of said up-signal frame, to transmit said up-signal frame to said network terminal equipment, to copy said detected D-channel bits into echo channel bits of a down-signal frame from said net-work terminal equipment to said terminal equipment received immediately after the transmission of said up-signal frame, and to transmit said down-signal frame to said terminal equipment.
Abstract translation: 一种包括接口缓冲器和接口适配器的ISDN用户网络接口系统。 提供在ISDN网络终端设备和终端设备之间的接口缓冲器,用于接收从所述终端设备发送到所述网络终端设备的上行信号帧,以存储所述上行信号帧,并将所述存储的上行信号帧发送到 所述网络终端设备能够检测所述上行信号帧的同步的定时。 所述接口适配器设置在所述ISDN网络终端设备和所述终端设备之间,以接收从所述终端设备发送到所述网络终端设备的上行信号帧,以检测所述上行信号帧的D信道比特,以发送所述上行 对所述网络终端设备进行信号复制,将所述检测到的D信道位复制到从所述网络工作终端设备到所述上行信号帧发送之后立即接收到的所述终端设备的下行信号帧的回声信道位中, 并将所述下行信号帧发送到所述终端设备。
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