公开(公告)号：US20240136936A1

公开(公告)日：2024-04-25

申请号：US18271497

申请日：2021-09-29

Applicant: Hitachi Astemo, Ltd.

Inventor： Akira MIMA ,  Takeshi TOKUYAMA ,  Junpei KUSUKAWA ,  Takashi HIRAO

IPC: H02M7/00 ,  H02M7/48 ,  H05K7/20

CPC classification number: H02M7/003 ,  H02M7/48 ,  H05K7/2039

Abstract: Provided are a positive electrode terminal and a negative electrode terminal being terminals of a capacitor element; a positive electrode conductor plate connected to the positive electrode terminal; a negative electrode conductor plate connected to the negative electrode terminal; and a power conversion module connected to the two conductor plates. The positive electrode terminal and the negative electrode terminal are formed along an arrangement direction of the capacitor element. The positive electrode conductor plate and the negative electrode conductor plate form a laminated conductor portion in which the positive electrode conductor plate and the negative electrode conductor plate have respective main surfaces disposed, to face the main surface of the capacitor element, and are laminated to each other. The laminated conductor portion has a first laminated region laminated to face a main surface of the negative electrode terminal and a second laminated region laminated to face a main surface of the positive electrode terminal.

公开(公告)号：US20250006566A1

公开(公告)日：2025-01-02

申请号：US18712774

申请日：2022-11-25

Applicant: HITACHI ASTEMO, LTD.

Inventor： Nobutake TSUYUNO ,  Akira MIMA ,  Yujiro KANEKO ,  Eiichi IDE

IPC: H01L23/051 ,  H01L21/56 ,  H01L23/31 ,  H01L23/473 ,  H01L23/64 ,  H01L25/07 ,  H01L25/18 ,  H02M7/00

Abstract: A semiconductor module includes: a plurality of power semiconductor elements arranged in parallel to each other; a first conductor plate and a second conductor plate respectively bonded to an upper surface and a lower surface of the power semiconductor elements arranged in parallel to each other; a wiring substrate provided on the second conductor plate; and an electronic component mounted on the wiring substrate, the power semiconductor elements, the first conductor plate, the second conductor plate, the wiring substrate, and the electronic component being sealed with a sealing member. The first conductor plate positioned on the upper surface side of the wiring substrate has at least one of a recess and a through hole in a region facing with the electronic component on the wiring substrate.

公开(公告)号：US20240235410A9

公开(公告)日：2024-07-11

申请号：US18271497

申请日：2021-09-30

Applicant: Hitachi Astemo, Ltd.

Inventor： Akira MIMA ,  Takeshi TOKUYAMA ,  Junpei KUSUKAWA ,  Takashi HIRAO

IPC: H02M7/00 ,  H02M7/48 ,  H05K7/20

CPC classification number: H02M7/003 ,  H02M7/48 ,  H05K7/2039

Abstract: Provided are a positive electrode terminal and a negative electrode terminal being terminals of a capacitor element; a positive electrode conductor plate connected to the positive electrode terminal; a negative electrode conductor plate connected to the negative electrode terminal; and a power conversion module connected to the two conductor plates. The positive electrode terminal and the negative electrode terminal are formed along an arrangement direction of the capacitor element. The positive electrode conductor plate and the negative electrode conductor plate form a laminated conductor portion in which the positive electrode conductor plate and the negative electrode conductor plate have respective main surfaces disposed, to face the main surface of the capacitor element, and are laminated to each other. The laminated conductor portion has a first laminated region laminated to face a main surface of the negative electrode terminal and a second laminated region laminated to face a main surface of the positive electrode terminal.

公开(公告)号：US20230059509A1

公开(公告)日：2023-02-23

申请号：US17797148

申请日：2020-10-23

Applicant: Hitachi Astemo, Ltd.

Inventor： Akira MIMA ,  Yukio HATTORI ,  Eiichi IDE

IPC: H02M7/00 ,  H02K11/33 ,  H02K5/22

Abstract: An object of the present invention is to provide a power conversion device configured to attain suppression of heat concentration and miniaturization of the device. The power conversion device 40 includes a power module 17 for converting dc power into ac power, a first circuit substrate (power circuit substrate) 16 including a capacitor 31 for smoothing the dc power, and a casing 20 for storing the power module 17 and the first circuit substrate 16. Either the first circuit substrate 16 or the power module 17 is disposed on an inner surface 20bb of a side wall 20b having an outer wall surface 20ba of the casing 20, and the other is disposed on a predetermined inner wall surface 20a of the casing 20 to form an angle with the inner surface 20bb.

公开(公告)号：US20230148137A1

公开(公告)日：2023-05-11

申请号：US17911962

申请日：2021-01-15

Applicant: Hitachi Astemo, Ltd.

Inventor： Takahiro ARAKI ,  Akira MIMA ,  Noriyuki MAEKAWA

IPC: H01L27/02 ,  H01L29/866

CPC classification number: H01L27/0255 ,  H01L29/866

Abstract: There has been a problem that when a value of a current flowing through a thermistor increases, a voltage drop generated in the thermistor increases, and variations occur in a clamp voltage. A semiconductor device includes: a switching element that is on-off controlled; and a surge voltage protection circuit connected between a positive electrode side terminal of the switching element and a control terminal of the switching element. The surge voltage protection circuit includes a first Zener diode, a second Zener diode connected in series with the first Zener diode, and a temperature characteristic compensating element having a temperature coefficient different in polarity from the first Zener diode and the second Zener diode and connected in parallel with the second Zener diode.