摘要:
An instruction fetch apparatus is disclosed which includes: a program counter configured to manage the address of an instruction targeted to be executed in a program in which instructions belonging to a plurality of instruction sequences are placed sequentially; a change designation register configured to designate a change of an increment value on the program counter; an increment value register configured to hold the changed increment value; and an addition control section configured such that if the change designation register designates the change of the increment value on the program counter, then the addition control section increments the program counter based on the changed increment value held in the increment value register, the addition control section further incrementing the program counter by an instruction word length if the change designation register does not designate any change of the increment value on the program counter.
摘要:
An instruction fetch apparatus is disclosed which includes: a program counter configured to manage the address of an instruction targeted to be executed in a program in which instructions belonging to a plurality of instruction sequences are placed sequentially; a change designation register configured to designate a change of an increment value on the program counter; an increment value register configured to hold the changed increment value; and an addition control section configured such that if the change designation register designates the change of the increment value on the program counter, then the addition control section increments the program counter based on the changed increment value held in the increment value register, the addition control section further incrementing the program counter by an instruction word length if the change designation register does not designate any change of the increment value on the program counter.
摘要:
Disclosed herein is a cache memory including: a tag storage section including entries each including a tag address and a pending indication portion, at least one of the entries being to be referred to by a first address portion of an access address; a data storage section; a tag control section configured to compare a second address portion of the access address with the tag address included in each of the entries referred to to detect an entry whose tag address matches the second address portion, and, when the pending indication portion included in the detected entry indicates pending, cause an access related to the access address to be suspended; and a data control section configured to select data corresponding to the detected entry from among the data storage section, when the pending indication portion included in the detected entry does not indicate pending.
摘要:
The present invention provides a processor including data manipulating means for generating an arbitrary combination of elements of a first input vector and elements of a second input vector, arithmetic means for performing a product-sum operation on the combination, and repetition control means for controlling the generation of the combination by the data manipulating means and the product-sum operation by the arithmetic means according to a number of the elements of the first input vector and the second input vector.
摘要:
Disclosed herein is a floating-point number arithmetic circuit for efficiently supplying data to be performed arithmetic operation. The floating-point number arithmetic circuit includes an floating-point number arithmetic unit for performing a predetermined floating-point number arithmetic operation on a floating-point number of a predetermined precision, and a converting circuit for converting data into the floating-point number of predetermined precision and supplying the floating-point number of the predetermined precision to at least either one of input terminals of the floating-point number arithmetic unit.
摘要:
The present invention provides a processor including data manipulating means for generating an arbitrary combination of elements of a first input vector and elements of a second input vector, arithmetic means for performing a product-sum operation on the combination, and repetition control means for controlling the generation of the combination by the data manipulating means and the product-sum operation by the arithmetic means according to a number of the elements of the first input vector and the second input vector.
摘要:
Disclosed herein is a floating-point number arithmetic circuit for efficiently supplying data to be performed arithmetic operation. The floating-point number arithmetic circuit includes an floating-point number arithmetic unit for performing a predetermined floating-point number arithmetic operation on a floating-point number of a predetermined precision, and a converting circuit for converting data into the floating-point number of predetermined precision and supplying the floating-point number of the predetermined precision to at least either one of input terminals of the floating-point number arithmetic unit.
摘要:
During turning of a vehicle, a vehicle body deceleration due to a cornering drag is obtained. An electronically controlled coupling is controlled to give, to rear wheels, a pre-torque set to be larger as the vehicle body deceleration is larger. Also, the pre-torque is restricted by an upper limit of the pre-torque that is set to be lower as a differential rotational speed of the front and rear wheels is smaller. By giving the pre-torque to the rear wheels, if a shift condition for a four-wheel drive state is established subsequently, a driving force can be generated in the rear wheels substantially at the same time that a fastening force of the electronically controlled coupling is increased, thereby the shift to the four-wheel drive state is immediately completed. Consequently, delay in response is not generated in the shift.
摘要:
Provided is a conductive material to be used for a resistor and a sensor, which is enhanced its mechanical strength while maintaining a stable resistance ratio. In the conductive material used for the resistor and the sensor, 400 to 10,000 ppm of Sr is contained in Pt, and the balance is an inevitable impurity. An intermetallic compound phase formed of Pt and Sr is precipitated and dispersed in Pt.
摘要:
A vibration damping device including a hollow housing having a fastening frame and a housing main body attached to the fastening frame for providing the hollow housing enclosing a mass member. With the housing main body inserted between top and base plate portions through an opening in the fastening frame, an urging force of a first spring projection is directed against the housing main body from one of the top base plate portions towards the other thereby holding the housing main body pressed against the other of the top and base plate portions, while an urging force of a second spring projection is directed against the housing main body towards the opening side from a back plate portion causing the housing main body to become engaged by a catch projection, for attaching the housing main body to the fastening frame and preventing it from slipping out through the opening of the fastening frame.