INSTRUCTION FETCH APPARATUS, PROCESSOR AND PROGRAM COUNTER ADDITION CONTROL METHOD
    1.
    发明申请
    INSTRUCTION FETCH APPARATUS, PROCESSOR AND PROGRAM COUNTER ADDITION CONTROL METHOD 有权
    指令设备,处理器和程序计数器附加控制方法

    公开(公告)号:US20110238952A1

    公开(公告)日:2011-09-29

    申请号:US13024580

    申请日:2011-02-10

    IPC分类号: G06F9/38

    摘要: An instruction fetch apparatus is disclosed which includes: a program counter configured to manage the address of an instruction targeted to be executed in a program in which instructions belonging to a plurality of instruction sequences are placed sequentially; a change designation register configured to designate a change of an increment value on the program counter; an increment value register configured to hold the changed increment value; and an addition control section configured such that if the change designation register designates the change of the increment value on the program counter, then the addition control section increments the program counter based on the changed increment value held in the increment value register, the addition control section further incrementing the program counter by an instruction word length if the change designation register does not designate any change of the increment value on the program counter.

    摘要翻译: 一种提取指令装置,其特征在于包括:程序计数器,被配置为在其中顺序放置属于多个指令序列的指令的程序中管理目标要执行的指令的地址; 变更指定寄存器,被配置为指定所述程序计数器上的增量值的变化; 增量值寄存器,被配置为保持所述改变的增量值; 以及附加控制部分,其被配置为使得如果所述改变指定寄存器指定所述程序计数器上的所述增量值的改变,则所述相加控制部分基于所述增量值寄存器中保持的改变的增量值来增加所述程序计数器,所述加法控制 如果改变指定寄存器没有指定程序计数器上的增量值的任何改变,则进一步将程序计数器递增指令字长度。

    Instruction fetch apparatus, processor and program counter addition control method
    2.
    发明授权
    Instruction fetch apparatus, processor and program counter addition control method 有权
    指令提取装置,处理器和程序计数器附加控制方法

    公开(公告)号:US08650385B2

    公开(公告)日:2014-02-11

    申请号:US13024580

    申请日:2011-02-10

    IPC分类号: G06F9/30 G06F9/40 G06F15/00

    摘要: An instruction fetch apparatus is disclosed which includes: a program counter configured to manage the address of an instruction targeted to be executed in a program in which instructions belonging to a plurality of instruction sequences are placed sequentially; a change designation register configured to designate a change of an increment value on the program counter; an increment value register configured to hold the changed increment value; and an addition control section configured such that if the change designation register designates the change of the increment value on the program counter, then the addition control section increments the program counter based on the changed increment value held in the increment value register, the addition control section further incrementing the program counter by an instruction word length if the change designation register does not designate any change of the increment value on the program counter.

    摘要翻译: 一种提取指令装置,其特征在于包括:程序计数器,被配置为在其中顺序放置属于多个指令序列的指令的程序中管理目标要执行的指令的地址; 变更指定寄存器,被配置为指定所述程序计数器上的增量值的变化; 增量值寄存器,被配置为保持所述改变的增量值; 以及附加控制部分,其被配置为使得如果所述改变指定寄存器指定所述程序计数器上的所述增量值的改变,则所述相加控制部分基于所述增量值寄存器中保持的改变的增量值来增加所述程序计数器,所述加法控制 如果改变指定寄存器没有指定程序计数器上的增量值的任何改变,则进一步将程序计数器递增指令字长度。

    Cache memory and cache memory control apparatus
    3.
    发明申请
    Cache memory and cache memory control apparatus 审中-公开
    高速缓冲存储器和高速缓冲存储器控制装置

    公开(公告)号:US20100030966A1

    公开(公告)日:2010-02-04

    申请号:US12458053

    申请日:2009-06-30

    IPC分类号: G06F12/08 G06F12/00

    CPC分类号: G06F12/0859

    摘要: Disclosed herein is a cache memory including: a tag storage section including entries each including a tag address and a pending indication portion, at least one of the entries being to be referred to by a first address portion of an access address; a data storage section; a tag control section configured to compare a second address portion of the access address with the tag address included in each of the entries referred to to detect an entry whose tag address matches the second address portion, and, when the pending indication portion included in the detected entry indicates pending, cause an access related to the access address to be suspended; and a data control section configured to select data corresponding to the detected entry from among the data storage section, when the pending indication portion included in the detected entry does not indicate pending.

    摘要翻译: 本文公开了一种高速缓冲存储器,包括:标签存储部分,其包括各自包括标签地址和未决指示部分的条目,所述条目中的至少一个将由访问地址的第一地址部分引用; 数据存储部分; 标签控制部分,被配置为将访问地址的第二地址部分与参考的每个条目中包括的标签地址进行比较,以检测其标签地址与第二地址部分匹配的条目,并且当包括在 检测到的条目指示挂起,导致访问地址相关的访问被暂停; 以及数据控制部分,被配置为当所检测的条目中包括的未决指示部分未指示未决时,从数据存储部分中选择与所检测的条目相对应的数据。

    Processor
    4.
    发明申请
    Processor 有权
    处理器

    公开(公告)号:US20060112159A1

    公开(公告)日:2006-05-25

    申请号:US11274233

    申请日:2005-11-16

    IPC分类号: G06F7/38

    摘要: The present invention provides a processor including data manipulating means for generating an arbitrary combination of elements of a first input vector and elements of a second input vector, arithmetic means for performing a product-sum operation on the combination, and repetition control means for controlling the generation of the combination by the data manipulating means and the product-sum operation by the arithmetic means according to a number of the elements of the first input vector and the second input vector.

    摘要翻译: 本发明提供了一种处理器,包括用于产生第一输入向量的元素和第二输入向量的元素的任意组合的数据操作装置,用于对该组合执行乘积和运算的算术装置,以及用于控制 根据第一输入向量和第二输入向量的元素的数量,通过数据操作装置生成组合和乘法运算。

    Floating-point number arithmetic circuit for handling immediate values
    5.
    发明授权
    Floating-point number arithmetic circuit for handling immediate values 有权
    用于处理立即值的浮点数算术电路

    公开(公告)号:US07949696B2

    公开(公告)日:2011-05-24

    申请号:US11280244

    申请日:2005-11-17

    IPC分类号: G06F7/00 G06F7/38 G06F9/30

    摘要: Disclosed herein is a floating-point number arithmetic circuit for efficiently supplying data to be performed arithmetic operation. The floating-point number arithmetic circuit includes an floating-point number arithmetic unit for performing a predetermined floating-point number arithmetic operation on a floating-point number of a predetermined precision, and a converting circuit for converting data into the floating-point number of predetermined precision and supplying the floating-point number of the predetermined precision to at least either one of input terminals of the floating-point number arithmetic unit.

    摘要翻译: 这里公开了一种用于有效地提供要进行的算术运算的数据的浮点数运算电路。 浮点数算术电路包括用于对预定精度的浮点数执行预定的浮点数算术运算的浮点数运算单元和用于将数据转换为浮点数运算的浮点数运算单元 预定精度,并将预定精度的浮点数提供给浮点数运算单元的输入端中的至少一个。

    Processor
    6.
    发明授权
    Processor 有权
    处理器

    公开(公告)号:US07725520B2

    公开(公告)日:2010-05-25

    申请号:US11274233

    申请日:2005-11-16

    IPC分类号: G06F7/32 G06F7/38

    摘要: The present invention provides a processor including data manipulating means for generating an arbitrary combination of elements of a first input vector and elements of a second input vector, arithmetic means for performing a product-sum operation on the combination, and repetition control means for controlling the generation of the combination by the data manipulating means and the product-sum operation by the arithmetic means according to a number of the elements of the first input vector and the second input vector.

    摘要翻译: 本发明提供了一种处理器,包括用于产生第一输入向量的元素和第二输入向量的元素的任意组合的数据操作装置,用于对该组合执行乘积和运算的算术装置,以及用于控制 根据第一输入向量和第二输入向量的元素的数量,通过数据操作装置生成组合和乘法运算。

    Floating-point number arithmetic circuit
    7.
    发明申请
    Floating-point number arithmetic circuit 有权
    浮点数运算电路

    公开(公告)号:US20060112160A1

    公开(公告)日:2006-05-25

    申请号:US11280244

    申请日:2005-11-17

    IPC分类号: G06F7/38

    摘要: Disclosed herein is a floating-point number arithmetic circuit for efficiently supplying data to be performed arithmetic operation. The floating-point number arithmetic circuit includes an floating-point number arithmetic unit for performing a predetermined floating-point number arithmetic operation on a floating-point number of a predetermined precision, and a converting circuit for converting data into the floating-point number of predetermined precision and supplying the floating-point number of the predetermined precision to at least either one of input terminals of the floating-point number arithmetic unit.

    摘要翻译: 这里公开了一种用于有效地提供要进行的算术运算的数据的浮点数运算电路。 浮点数算术电路包括用于对预定精度的浮点数执行预定的浮点数算术运算的浮点数运算单元和用于将数据转换为浮点数运算的浮点数运算单元 预定精度,并将预定精度的浮点数提供给浮点数运算单元的输入端中的至少一个。

    Vehicle control device
    8.
    发明授权
    Vehicle control device 有权
    车辆控制装置

    公开(公告)号:US09566861B2

    公开(公告)日:2017-02-14

    申请号:US14408723

    申请日:2012-06-22

    IPC分类号: B60K23/08 B60K17/35

    CPC分类号: B60K23/0808 B60K17/35

    摘要: During turning of a vehicle, a vehicle body deceleration due to a cornering drag is obtained. An electronically controlled coupling is controlled to give, to rear wheels, a pre-torque set to be larger as the vehicle body deceleration is larger. Also, the pre-torque is restricted by an upper limit of the pre-torque that is set to be lower as a differential rotational speed of the front and rear wheels is smaller. By giving the pre-torque to the rear wheels, if a shift condition for a four-wheel drive state is established subsequently, a driving force can be generated in the rear wheels substantially at the same time that a fastening force of the electronically controlled coupling is increased, thereby the shift to the four-wheel drive state is immediately completed. Consequently, delay in response is not generated in the shift.

    摘要翻译: 在车辆转动期间,获得由于转弯阻力引起的车体减速。 控制电子控制的联轴器,以使车轮减速度较大时的前转矩设定为较大。 此外,由于前轮和后轮的差速旋转速度较小,预转矩的上限受限于设定为较低的预转矩的上限。 通过将后转矩提供给后轮,如果随后建立四轮驱动状态的换档状态,则可以在后轮中产生驱动力,大致同时电子联轴器的紧固力 增加,从而转移到四轮驱动状态立即完成。 因此,在转移中不产生响应延迟。

    Conductive material
    9.
    发明授权
    Conductive material 有权
    导电材料

    公开(公告)号:US08133432B2

    公开(公告)日:2012-03-13

    申请号:US12472554

    申请日:2009-05-27

    申请人: Koichi Hasegawa

    发明人: Koichi Hasegawa

    IPC分类号: C22C5/04

    CPC分类号: C22C5/04 H01B1/02

    摘要: Provided is a conductive material to be used for a resistor and a sensor, which is enhanced its mechanical strength while maintaining a stable resistance ratio. In the conductive material used for the resistor and the sensor, 400 to 10,000 ppm of Sr is contained in Pt, and the balance is an inevitable impurity. An intermetallic compound phase formed of Pt and Sr is precipitated and dispersed in Pt.

    摘要翻译: 提供了用于电阻器和传感器的导电材料,其在保持稳定的电阻比的同时增强其机械强度。 在用于电阻器和传感器的导电材料中,Pt中含有400至10,000ppm的Sr,余量是不可避免的杂质。 由Pt和Sr形成的金属间化合物相沉淀并分散在Pt中。

    Vibration damping device and manufacturing method thereof
    10.
    发明授权
    Vibration damping device and manufacturing method thereof 失效
    振动阻尼装置及其制造方法

    公开(公告)号:US08020677B2

    公开(公告)日:2011-09-20

    申请号:US12216413

    申请日:2008-07-03

    IPC分类号: F16F15/08

    CPC分类号: F16F7/108 Y10T29/49826

    摘要: A vibration damping device including a hollow housing having a fastening frame and a housing main body attached to the fastening frame for providing the hollow housing enclosing a mass member. With the housing main body inserted between top and base plate portions through an opening in the fastening frame, an urging force of a first spring projection is directed against the housing main body from one of the top base plate portions towards the other thereby holding the housing main body pressed against the other of the top and base plate portions, while an urging force of a second spring projection is directed against the housing main body towards the opening side from a back plate portion causing the housing main body to become engaged by a catch projection, for attaching the housing main body to the fastening frame and preventing it from slipping out through the opening of the fastening frame.

    摘要翻译: 一种减震装置,包括具有紧固框架的中空壳体和附接到紧固框架的壳体主体,用于提供封闭质量构件的中空壳体。 在壳体主体通过紧固框架中的开口插入在顶板部分和基板部分之间的情况下,第一弹簧突起的推动力从顶部基板部分中的一个向另一个朝向另一个引导,从而将壳体 主体压靠在顶板部分和基板部分中的另一个上,同时第二弹簧突起的推动力从背板部分朝着开口侧引导,使得壳体主体被卡扣 用于将壳体主体附接到紧固框架并防止其从紧固框架的开口滑出。