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1.发明授权Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards 有权具有单个锁存结构和相关编程方法，系统和存储卡的多位闪存器件公开(公告)号：US07643339B2
公开(公告)日：2010-01-05
申请号：US11801792
申请日：2007-05-11
申请人： Ho-kil Lee , Jin-Yup Lee
发明人： Ho-kil Lee , Jin-Yup Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621 , G11C2211/5642 , G11C2216/14
摘要： A multi-bit non-volatile memory device is provided. The memory device includes a memory cell array including a plurality of memory cells. A page buffer is electrically coupled to the memory cell array. The page buffer includes a plurality of latches configured to store a first bit of multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. A buffer random access memory (RAM) is electrically coupled to the page buffer. The buffer RAM is configured to store a second bit of the multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. Related systems, memory cards and methods are also provided.
摘要翻译： 提供了一种多位非易失性存储器件。 存储器件包括包括多个存储单元的存储单元阵列。 页面缓冲器电耦合到存储单元阵列。 页面缓冲器包括多个锁存器，其被配置为存储要写入或从存储器单元阵列的多个存储器单元之一读出的多位数据的第一位。 缓冲随机存取存储器（RAM）电耦合到页缓冲器。 缓冲RAM被配置为存储要写入或从存储单元阵列的多个存储单元之一读出的多位数据的第二位。 还提供了相关系统，存储卡和方法。
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2.发明申请Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards 有权具有单个锁存结构和相关编程方法，系统和存储卡的多位闪存器件公开(公告)号：US20070268748A1
公开(公告)日：2007-11-22
申请号：US11801792
申请日：2007-05-11
申请人： Ho-kil Lee , Jin-Yup Lee
发明人： Ho-kil Lee , Jin-Yup Lee
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621 , G11C2211/5642 , G11C2216/14
摘要： A multi-bit non-volatile memory device is provided. The memory device includes a memory cell array including a plurality of memory cells. A page buffer is electrically coupled to the memory cell array. The page buffer includes a plurality of latches configured to store a first bit of multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. A buffer random access memory (RAM) is electrically coupled to the page buffer. The buffer RAM is configured to store a second bit of the multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. Related systems, memory cards and methods are also provided.
摘要翻译： 提供了一种多位非易失性存储器件。 存储器件包括包括多个存储单元的存储单元阵列。 页面缓冲器电耦合到存储单元阵列。 页面缓冲器包括多个锁存器，其被配置为存储要写入或从存储器单元阵列的多个存储器单元之一读出的多位数据的第一位。 缓冲随机存取存储器（RAM）电耦合到页缓冲器。 缓冲RAM被配置为存储要写入或从存储单元阵列的多个存储单元之一读出的多位数据的第二位。 还提供了相关系统，存储卡和方法。
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