公开(公告)号：US5827768A

公开(公告)日：1998-10-27

申请号：US888765

申请日：1997-07-07

Applicant: Horng-Chih Lin ,  Tiao-yuan Huang

Inventor： Horng-Chih Lin ,  Tiao-yuan Huang

IPC: H01L21/225 ,  H01L21/336 ,  H01L21/768 ,  H01L29/417

CPC classification number: H01L29/66575 ,  H01L21/76895 ,  H01L29/41775 ,  H01L21/2257 ,  H01L29/665

Abstract: A new method for manufacturing an MOS transistor is applied in the deep submicron process. In this method, a polysilicon layer is mainly used to form a raised source/drain structure and self-alignment is achieved by means of a planarization process. This method can reduce short channel effects and the series impedance of the source/drain as well as accomplish the local interconnection of a circuit and planarization. Therefore, this method is very suitable for manufacturing devices in the deep submicron process.

Abstract translation: 在深亚微米工艺中应用了一种用于制造MOS晶体管的新方法。 在该方法中，多晶硅层主要用于形成升高的源极/漏极结构，并且通过平坦化工艺实现自对准。 该方法可以减少源极/漏极的短沟道效应和串联阻抗，并实现电路的局部互连和平坦化。 因此，该方法非常适合于在深亚微米工艺中制造器件。

公开(公告)号：US5893741A

公开(公告)日：1999-04-13

申请号：US797745

申请日：1997-02-07

Applicant: Tiao-yuan Huang

Inventor： Tiao-yuan Huang

IPC: H01L21/336 ,  H01L21/768 ,  H01L29/08

CPC classification number: H01L29/66628 ,  H01L21/76895 ,  H01L29/0847

Abstract: A method for formation of both local innerconnection and silicidation of source/drain transistors using the deposition of a blanket silicon layer over the entire top surface of the transistors and selectively stripping of unwanted portions of the silicon layer is disclosed. The method includes the step of applying a photoresist mask to map out where the local interconnection and source/drain are to be located. The final recited step is to deposit a thin metal layer to provide for the silicidation to complete the transistor. The silicon layer that is deposited has a thickness of 20 to 300 millimeters, and the thin metal layer is either cobalt or titanium having a thickness of 10 millimeters to 100 millimeters.

Abstract translation: 公开了一种用于使用在晶体管的整个顶表面上沉积覆盖硅层并选择性剥离硅层的不期望部分来形成源极/漏极晶体管的局部内部连接和硅化的方法。 该方法包括施加光致抗蚀剂掩模以绘制局部互连和源极/漏极将位于哪里的步骤。 最后叙述的步骤是沉积薄金属层以提供硅化物来完成晶体管。 沉积的硅层的厚度为20至300毫米，薄金属层为厚度为10毫米至100毫米的钴或钛。