摘要:
A light-emitting diode (LED) driving circuit includes an LED control circuit and a power stage circuit. The LED control circuit shifts an input pulse width modulation (PWM) signal toward a higher frequency direction in a frequency domain to generate an output PWM signal having a duty cycle substantially the same as a duty cycle of the input PWM signal. The power stage circuit outputs an LED driving current according to the output PWM signal.
摘要:
A method for reducing resonance energy of an LCD panel includes providing a plurality of driving signal patterns, each defining a non-overlap area width of a synchronization signal and a scan-line charging frequency, and determining an order of the plurality of driving signal patterns to modulate driving signals of the LCD panel accordingly.
摘要:
A display device with a touch function is provided. The display device includes a display panel and a touch panel. The display panel has a plurality of image scan lines, and the image scan lines are respectively activated by a plurality of scan signals generated by a gate driver according to a time sequence. The touch panel has a plurality of touch scan lines and a plurality of touch sensing lines, wherein the touch scan lines and the touch sensing lines are disposed crossing each other for sensing a touched position. The gate driver also provides a plurality of touch scan signals to the touch scan lines according to a time sequence.
摘要:
A power management circuit for a liquid crystal display device is disclosed. The power management circuit includes one or more power generating circuits, for receiving one or more input voltages and generating one or more output voltages, respectively; a gate pulse modulation circuit, coupled between a gate high-level voltage source and a discharging control terminal, for generating a gate control signal; and a discharging controller, coupled to the discharging control terminal, for providing a discharging path for the gate pulse modulation circuit, wherein one of the gate pulse modulation circuit and the discharging controller is further coupled to a power supply such that the gate pulse modulation circuit discharges to the power supply during a gate discharging period, and the power supply is one of the one or more input voltages and the one or more output voltages.
摘要:
A method for reducing resonance energy of an LCD panel includes providing a plurality of driving signal patterns, each defining a non-overlap area width of a synchronization signal and a scan-line charging frequency, and determining an order of the plurality of driving signal patterns to modulate driving signals of the LCD panel accordingly.
摘要:
A power management circuit for a liquid crystal display device is disclosed. The power management circuit includes one or more power generating circuits, for receiving one or more input voltages and generating one or more output voltages, respectively; a gate pulse modulation circuit, coupled between a gate high-level voltage source and a discharging control terminal, for generating a gate control signal; and a discharging controller, coupled to the discharging control terminal, for providing a discharging path for the gate pulse modulation circuit, wherein one of the gate pulse modulation circuit and the discharging controller is further coupled to a power supply such that the gate pulse modulation circuit discharges to the power supply during a gate discharging period, and the power supply is one of the one or more input voltages and the one or more output voltages.
摘要:
A current cell for converting a digital signal to an analog current signal is disclosed. The current cell includes a first PMOS transistor which receives the digital signal from a pre-stage processor by the gate. A drain of the first PMOS transistor is grounded. A second PMOS transistor has a source which is connected to the source of the first PMOS transistor, a gate which receives an inverse signal of the digital signal from the pre-stage processor, and a drain for providing the analog current signal. A third PMOS transistor is connected between a voltage source and the source of the first PMOS transistor. The third PMOS transistor has a gate to which a first reference voltage is applied.