公开(公告)号：US20240243181A1

公开(公告)日：2024-07-18

申请号：US18581921

申请日：2024-02-20

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Bo Gao ,  Boning Huang ,  Longgu Tang ,  Yi Zhang ,  Feng Zhou ,  Fei Hu

IPC: H01L29/423 ,  H01L21/265 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/4236 ,  H01L21/26506 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/42364 ,  H01L29/66666 ,  H01L29/7827

Abstract: A trench gate semiconductor includes a substrate having a first conductivity type; an epitaxial layer having the first conductivity type, grown on the substrate; a well region having a second conductivity type, formed on a surface layer of the epitaxial layer; a source region having the first conductivity type, formed on a surface layer of the well region; a first trench, running through the well region from a surface of the source region to the epitaxial layer; a gate, formed in the first trench in a manner of being separated by a gate insulator; and an amorphous semiconductor layer, formed in the first trench and wrapping an outer bottom wall of the gate and corners on two sides of the outer bottom wall in a manner of being separated by the gate insulator, where the amorphous semiconductor layer is made of a low dielectric constant material.