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公开(公告)号：US11251136B2
公开(公告)日：2022-02-15
申请号：US17038756
申请日：2020-09-30
Applicant: Huawei Technologies Co., Ltd.
Inventor： Wei Wu , Ding Li , Hongcheng Yin , Xiongcai Kuang
IPC: H01L23/552 , H01L23/00
Abstract: A flip-chip die package includes a substrate, a die, a plurality of conductive bumps, and a first metal structure, where an upper surface of the die is electrically coupled, using the conductive bumps, to a surface that is of the substrate and that faces the die, and the first metal structure includes a plurality of first metal rods disposed between the substrate and the die, where each first metal rod is electrically coupled to the substrate and the die, and the first metal rods are arranged around a first active functional circuit, and the first active functional circuit includes an electromagnetic radiation capability or an electromagnetic receiving capability in the die.
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公开(公告)号：US11099997B2
公开(公告)日：2021-08-24
申请号：US16913680
申请日：2020-06-26
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Chunhua Tan , Weiqiang Jia , Ding Li , Wenqiang Yang , Liyu Wang , Pengli Ji
IPC: G06F12/0862 , G06F12/0866
Abstract: In a data prefetching method, a storage device obtains a first sequence stream length and a first access count of a target logical block after execution of a first data access request is completed. When a second data access request is received, the storage device modifies the first sequence stream length to a second sequence stream length and modifies the first access count to a second access count. The storage device further calculates a sequence degree of the target logical block based on the second sequence stream length and the second access count, and performs a data prefetching operation when the sequence degree of the target logical block exceeds a first prefetch threshold.
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公开(公告)号：US20200228069A1
公开(公告)日：2020-07-16
申请号：US16828425
申请日：2020-03-24
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Deyang Yin , Jun Li , Ding Li , Shuai Du
Abstract: An example audio play circuit includes a power supply module, a power amplifier, a coupling capacitor, a load, and a plosive suppression circuit. An output terminal of the power amplifier is connected to a first terminal of the coupling capacitor and an output terminal of the plosive suppression circuit, a second terminal of the coupling capacitor is connected to the load, and an output terminal of the power supply module is connected to a power supply terminal of the power amplifier and a power supply terminal of the plosive suppression circuit. The power supply module is configured to provide a direct current power supply voltage for the power amplifier and the plosive suppression circuit. When the direct current power supply voltage rises to the first voltage threshold, the plosive suppression circuit connects the first terminal of the coupling capacitor to the ground terminal.
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公开(公告)号：US10608653B2
公开(公告)日：2020-03-31
申请号：US16255663
申请日：2019-01-23
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Ding Li , Shuai Du , Hongpei Wang
Abstract: Embodiments of the present invention provide a digital-to-analog conversion circuit, where the digital-to-analog conversion circuit includes a signal amplitude detector and a digital-to-analog converter. When the signal amplitude detector detects a low signal amplitude, a first current module in the digital-to-analog converter operates normally and a second current module in the digital-to-analog converter stops operating. In addition, when stopping operating, the second current module is in a state of a third bias voltage and a fourth bias voltage that are generated by a second bias circuit. When the amplitude detector detects a high signal amplitude subsequently, the second current module resumes normal operation. After operating normally, the second current module switches back to a first bias voltage and a second bias voltage that are generated by a first bias circuit. This reduces a nonlinearity problem caused before a second current module resumes normal operation.
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公开(公告)号：US10560054B2
公开(公告)日：2020-02-11
申请号：US15907302
申请日：2018-02-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Ding Li , Shuai Du , Yixing Chu
Abstract: A circuit system including an operational amplification circuit is disclosed. The operational amplification circuit includes N stages of operational amplification units that are cascaded, an input terminal of the 1st stage of operational amplification unit is an input terminal of the operational amplification circuit, and an output terminal of the Nth stage of operational amplification unit is an output terminal of the operational amplification circuit; an output terminal of the ith stage of operational amplification unit is connected to an input terminal of the (i+1)th stage of operational amplification unit, so as to provide an input signal for the (i+1)th stage of operational amplification unit; and there is a feedback channel from the output terminal of the Nth stage of operational amplification unit to an input terminal of each of the 1st stage of operational amplification unit to the Nth stage of operational amplification unit.
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Patent Agency Ranking
公开(公告)号：US12210364B2
公开(公告)日：2025-01-28
申请号：US18047660
申请日：2022-10-19
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Taiyuan Liu , Ding Li
Abstract: A voltage regulation circuit mainly includes an oscillator and a regulation circuit. The oscillator is connected to a power supply circuit configured to supply power to a logic circuit, and a process corner type of the oscillator is the same as a process corner type of the logic circuit. The oscillator may generate a first clock signal based on an output voltage of the power supply circuit. The regulation circuit may control, based on the first clock signal, the power supply circuit to regulate the output voltage. For a logic circuit of an SS corner type, the output voltage of the power supply circuit may be increased, and for a logic circuit of an FF corner type, the output voltage of the power supply circuit may be decreased.
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公开(公告)号：US20200327061A1
公开(公告)日：2020-10-15
申请号：US16913680
申请日：2020-06-26
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Chunhua Tan , Weiqiang Jia , Ding Li , Wenqiang Yang , Liyu Wang , Pengli Ji
IPC: G06F12/0862 , G06F12/0866
Abstract: In a data prefetching method, a storage device obtains a first sequence stream length and a first access count of a target logical block after execution of a first data access request is completed. When a second data access request is received, the storage device modifies the first sequence stream length to a second sequence stream length and modifies the first access count to a second access count. The storage device further calculates a sequence degree of the target logical block based on the second sequence stream length and the second access count, and performs a data prefetching operation when the sequence degree of the target logical block exceeds a first prefetch threshold.
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公开(公告)号：US20200045417A1
公开(公告)日：2020-02-06
申请号：US16601133
申请日：2019-10-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ding Li , Shuai Du , Jun Li , Deyang Yin
Abstract: A pop sound suppression method, an audio output circuit, and a terminal suppress a pop sound that is generated when an audio output circuit is in an alternating current (AC) coupling structure. The output circuit includes an output power amplifier, a common-mode voltage buffer, a reference voltage generation circuit, a powered-on pop sound suppression switch, and a common-mode switch. The powered-on pop sound suppression switch is configured to control, in a power-on process of the audio output circuit, a voltage level of an output node to be zero. The common-mode switch is configured to control, when a reference voltage level of the reference voltage generation circuit is zero, the voltage level of the output node to be equal to the reference level.
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公开(公告)号：US20230113887A1
公开(公告)日：2023-04-13
申请号：US18047660
申请日：2022-10-19
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Taiyuan Liu , Ding Li
IPC: G05F1/10
Abstract: A voltage regulation circuit mainly includes an oscillator and a regulation circuit. The oscillator is connected to a power supply circuit configured to supply power to a logic circuit, and a process corner type of the oscillator is the same as a process corner type of the logic circuit. The oscillator may generate a first clock signal based on an output voltage of the power supply circuit. The regulation circuit may control, based on the first clock signal, the power supply circuit to regulate the output voltage. For a logic circuit of an SS corner type, the output voltage of the power supply circuit may be increased, and for a logic circuit of an FF corner type, the output voltage of the power supply circuit may be decreased.
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公开(公告)号：US10903801B2
公开(公告)日：2021-01-26
申请号：US16720771
申请日：2019-12-19
Applicant: Huawei Technologies Co., Ltd.
Inventor： Deyang Yin , Jun Li , Ding Li , Shuai Du
Abstract: An audio processing circuit includes a cascade operational amplifier circuit, an output node, and a pull-down circuit. The cascade operational amplifier circuit includes a first operational amplifier circuit and a second operational amplifier circuit. The first operational amplifier circuit includes a main operational amplifier and a secondary operational amplifier that are connected in parallel. The pull-down circuit is configured to pull down a voltage at the output node after the first operational amplifier circuit is turned on. The second operational amplifier circuit is configured to, after the secondary operational amplifier is turned on, control a voltage gain of the secondary operational amplifier to change gradually from low to high.
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