Chip package device
    2.
    发明授权

    公开(公告)号:US11430760B2

    公开(公告)日:2022-08-30

    申请号:US16931819

    申请日:2020-07-17

    Abstract: A chip package device includes a chip, and a first substrate and a second substrate that are disposed opposite to each other, where the chip is disposed on a surface that is of the first substrate and that faces the second substrate. The chip is electrically connected to the first substrate through a first conductive part, the first substrate is electrically connected to the second substrate through a second conductive part, and a heat dissipation passage is formed between the chip and the second substrate through a thermally conductive layer. The chip package device may further include a molding compound that is configured to wrap the chip. The thermally conductive layer disposed between the chip and the second substrate can quickly dissipate a large amount of heat generated by the chip to the second substrate so that the chip maintains a normal temperature.

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