公开(公告)号：US11043575B2

公开(公告)日：2021-06-22

申请号：US16417544

申请日：2019-05-20

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiaolong Ma ,  Riqing Zhang ,  Stephane Badel

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06 ,  B82Y10/00 ,  H01L29/76

Abstract: The invention provides a fabrication method of a field-effect transistor. The method includes: forming a support structure with a superlattice feature on a semiconductor substrate, where the support structure includes a first semiconductor material layer and a second semiconductor material layer that are alternately disposed, and an isolation layer is disposed on two sides of the support structure; forming, along a boundary between the isolation layer and the support structure, a dummy gate structure that covers the support structure, where a length of the dummy gate structure in a gate length direction is less than the first semiconductor material layer; removing, along the gate length direction, an area other than a sacrificial layer in the first semiconductor material layer to form an insulation groove,; and forming a source and a drain in a preset source drain area along the gate length direction.

公开(公告)号：US11664440B2

公开(公告)日：2023-05-30

申请号：US17352161

申请日：2021-06-18

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiaolong Ma ,  Riqing Zhang ,  Stephane Badel

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  B82Y10/00 ,  H01L29/76

CPC classification number: H01L29/66545 ,  B82Y10/00 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66469 ,  H01L29/66787 ,  H01L29/7613 ,  H01L29/785

Abstract: An embodiment of the invention provides a fabrication method of a field-effect transistor. The method includes: forming a support structure with a superlattice feature on a semiconductor substrate, where the support structure includes a first semiconductor material layer and a second semiconductor material layer that are alternately disposed, and an isolation layer is disposed on two sides of the support structure; forming, along a boundary between the isolation layer and the support structure, a dummy gate structure that covers the support structure, where a length of the dummy gate structure in a gate length direction is less than the first semiconductor material layer; removing, along the gate length direction, an area other than a sacrificial layer in the first semiconductor material layer to form an insulation groove; and forming a source and a drain in a preset source drain area along the gate length direction.

公开(公告)号：US11088032B2

公开(公告)日：2021-08-10

申请号：US16239401

申请日：2019-01-03

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wen Yang ,  Riqing Zhang ,  Yu Xia

IPC: H01L21/8238 ,  H01L29/778 ,  H01L21/265 ,  H01L29/739 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L27/092 ,  H01L29/24

Abstract: In embodiments of the present disclosure, an ambient medium of a two-dimensional semiconductor is doped or an ambient medium of a semiconductor is locally filled with a solid material, to form a filled region, and an electronic device based on the two-dimensional semiconductor is implemented by means of a doping effect of the doped region or the filled region on a characteristic of the two-dimensional semiconductor. In the embodiments of the present disclosure, doping the two-dimensional semiconductor is not directly processing the two-dimensional semiconductor. Therefore, damage caused to the two-dimensional semiconductor in a doping process and device performance deterioration caused accordingly can be effectively reduced, and stability of device performance after doping is improved.

公开(公告)号：US20190139835A1

公开(公告)日：2019-05-09

申请号：US16239401

申请日：2019-01-03

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wen Yang ,  Riqing Zhang ,  Yu Xia

IPC: H01L21/8238 ,  H01L21/265 ,  H01L27/092 ,  H01L21/02

Abstract: In embodiments of the present disclosure, an ambient medium of a two-dimensional semiconductor is doped or an ambient medium of a semiconductor is locally filled with a solid material, to form a filled region, and an electronic device based on the two-dimensional semiconductor is implemented by means of a doping effect of the doped region or the filled region on a characteristic of the two-dimensional semiconductor. In the embodiments of the present disclosure, doping the two-dimensional semiconductor is not directly processing the two-dimensional semiconductor. Therefore, damage caused to the two-dimensional semiconductor in a doping process and device performance deterioration caused accordingly can be effectively reduced, and stability of device performance after doping is improved.