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公开(公告)号：US20240356673A1
公开(公告)日：2024-10-24
申请号：US18753751
申请日：2024-06-25
发明人： Wenbin Yang , Tongtong Wang , Xinyuan Wang
CPC分类号： H04L1/0071 , H03M13/2792 , H03M13/2906 , H04L1/0057
摘要： An embodiment of the present disclosure contemplates a data sending and receiving method and apparatus. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device.
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公开(公告)号：US11843452B2
公开(公告)日：2023-12-12
申请号：US18146634
申请日：2022-12-27
发明人： Xiang He , Yunlei Qi , Jingfeng Chen , Tao Lin , Junmin Song , Xinyuan Wang
IPC分类号： H04J3/06
CPC分类号： H04J3/0661
摘要： A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
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公开(公告)号：US20220329352A1
公开(公告)日：2022-10-13
申请号：US17850027
申请日：2022-06-27
发明人： Tongtong Wang , Xinyuan Wang
摘要： A method includes a network device receiving a plurality of fragments of an Ethernet frame, where the plurality of fragments include an initial fragment and a first fragment, and where the initial fragment includes a destination media access control (MAC) address field. In response to an error occurring in the Ethernet frame, the first fragment is changed to a second fragment, where the second fragment includes second type indication information (TII) and second to-be-transmitted data (TBTD), where the second TII indicates that a type of the second TBTD is a control character, where a value of first TBTD is different from a value of the second TBTD, and where the second TBTD indicates that an error occurs in the Ethernet frame. The network device sends the second fragment to a destination device.
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公开(公告)号：US20220094636A1
公开(公告)日：2022-03-24
申请号：US17542813
申请日：2021-12-06
发明人： Zongpeng Du , Guoyi Chen , Jie Dong , Xinyuan Wang , Jun Gong
IPC分类号： H04L12/741 , H04L12/721 , H04L29/02 , H04L12/52 , H04J3/16 , H04L12/46 , H04Q3/68 , G06K7/01 , H04L12/417 , H04L12/715
摘要： A data sending method includes receiving, by a forwarding device using a first flexible Ethernet (FlexE) group and in multiple timeslots included in a first timeslot set, multiple first encoded data blocks from a physical coding sublayer (PCS), determining, by the forwarding device according to the timeslots included in the first timeslot set and the first FlexE group, a second FlexE group and multiple timeslots included in a second timeslot set, and sending, by the forwarding device, the first encoded data blocks using the second FlexE group and in the timeslots included in the second timeslot set.
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公开(公告)号：US20220014472A1
公开(公告)日：2022-01-13
申请号：US17484575
申请日：2021-09-24
发明人： Jiayi Zhang , Tongtong Wang , Xinyuan Wang
IPC分类号： H04L12/815 , H04L12/26 , H04L12/801 , H04L12/835
摘要： A network configuration method includes determining an end-to-end latency upper bound of data traffic between two end nodes, determining an end-to-end latency constraint of the data traffic between the two end nodes, determining, based on the end-to-end latency upper bound and the end-to-end latency constraint, for a first network shaper, at least one configuration parameter that satisfies the end-to-end latency constraint, and configuring the first network shaper for the data traffic based on the at least one configuration parameter such that the traffic after being shaped by the shaper satisfies the network latency constraint.
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公开(公告)号：US11146669B2
公开(公告)日：2021-10-12
申请号：US16392178
申请日：2019-04-23
发明人： Penghao Si , Xinyuan Wang , Jingfeng Chen
摘要： A data transmission method includes: obtaining multiple data blocks sent by L FlexE clients, L is greater than or equal to 1; and sending a data frame including the multiple data blocks to a physical-layer device, where a transmission rate of the data frame is N*100 Gbit/s, the data frame includes T data block groups, each of the T data block groups includes M continuous data block subgroups, each of the M continuous data block subgroups includes R*N continuous data blocks, the data frame further includes T overhead block groups, a tth overhead block group includes N continuous overhead blocks. According to the method, each data block subgroup in a data frame can include R*N data blocks, and each overhead block group can include N overhead blocks, and a data transmission rate can be adjusted flexibly.
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公开(公告)号：US11108485B2
公开(公告)日：2021-08-31
申请号：US16860688
申请日：2020-04-28
发明人： Xiang He , Yunlei Qi , Jingfeng Chen , Tao Lin , Junmin Song , Xinyuan Wang
摘要： A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
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公开(公告)号：US10797828B2
公开(公告)日：2020-10-06
申请号：US16374414
申请日：2019-04-03
发明人： Wenbin Yang , Tongtong Wang , Xinyuan Wang
摘要： An embodiment of the present invention discloses a data sending and receiving method. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device and error correction capability of a receiving device could be improved. In addition, in the present invention, an operation of writing by row and reading by column does not need to be performed. Therefore, no delay is generated.
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公开(公告)号：US10320602B2
公开(公告)日：2019-06-11
申请号：US15644350
申请日：2017-07-07
发明人： Wenbin Yang , Xinyuan Wang , Tongtong Wang
IPC分类号： H04L27/38 , H04L25/493 , H04L1/00 , H04B14/02 , H04L25/49
摘要： A data processing method and an apparatus, where the method includes receiving m data streams using m receive ports respectively, where the m data streams include m×m data units, and the m×m data units form an m-order matrix A, keeping a location of one element in each row in the matrix A unchanged and moving remaining m−1 elements to remaining m−1 rows respectively in order to form an m-order matrix B, where a column number of each element in the remaining m−1 elements in the matrix A before the element is moved equals a column number of the element in the remaining m−1 elements in the matrix B after the element is moved, and sending using m transmit ports, the m×m elements in the matrix B to m different levels of a pulse amplitude modulation (PAM) circuit respectively for performing modulation.
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公开(公告)号：US20240048273A1
公开(公告)日：2024-02-08
申请号：US18488864
申请日：2023-10-17
发明人： Wenbin Yang , Tongtong Wang , Xinyuan Wang
CPC分类号： H04L1/0071 , H03M13/2792 , H03M13/2906 , H04L1/0057
摘要： An embodiment of the present disclosure contemplates a data sending and receiving method and apparatus. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device.
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