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14 条记录 (耗时 0.039 秒)

    Power management for processing unit
    6.
    发明授权
    Power management for processing unit 有权
    处理单元电源管理

    公开(公告)号：US08386807B2

    公开(公告)日：2013-02-26

    申请号：US12242000

    申请日：2008-09-30

    申请人： Efraim Rotem ,  Dan Baum ,  Rajwan Doron ,  Omer Vikinski ,  Ronny Korner ,  Kosta Luria

    发明人： Efraim Rotem ,  Dan Baum ,  Rajwan Doron ,  Omer Vikinski ,  Ronny Korner ,  Kosta Luria

    IPC分类号： G06F1/00

    CPC分类号： G06F1/3203

    摘要： Methods, apparatuses, and systems for managing power of a processing unit are described herein. Some embodiments include determining a voltage variation of a subset of current components of a current consumed by a processing unit. Other embodiments include detecting architectural events on a processing core of the processing unit and instituting various actions to reduce an input rate of instructions to the core. Other embodiments may be described and claimed.

    摘要翻译： 本文描述了用于管理处理单元的功率的方法，装置和系统。 一些实施例包括确定由处理单元消耗的电流的当前分量的子集的电压变化。 其他实施例包括检测处理单元的处理核心上的架构事件并且建立各种动作以减少对核心的指令的输入速率。 可以描述和要求保护其他实施例。

    CPU CENTRIC PLATFORM POWER MANAGEMENT AND CURRENT UNDER REPORTING DETECTION
    7.
    发明公开
    CPU CENTRIC PLATFORM POWER MANAGEMENT AND CURRENT UNDER REPORTING DETECTION 审中-公开

    公开(公告)号：US20240061486A1

    公开(公告)日：2024-02-22

    申请号：US18086882

    申请日：2022-12-22

    申请人： Pavan Kumar ,  Michael Zelikson ,  Kosta Luria ,  Robert Santucci ,  Nadav Shulman ,  Horthense Tamdem

    发明人： Pavan Kumar ,  Michael Zelikson ,  Kosta Luria ,  Robert Santucci ,  Nadav Shulman ,  Horthense Tamdem

    IPC分类号： G06F1/28

    CPC分类号： G06F1/28

    摘要： To address problems associated with power management of electronic devices, the subject matter described herein provides improved power management solutions that enable CPUs and other electronic components to characterize real-time power consumption. This may be used to assess an effect of added platform level features after factory testing, and may be used to improve or optimize system performance. These solutions may include an accurate platform-independent integrated voltage measurement, dedicated to a reliable absolute voltage measurement that may be used for multiple purposes. The subject matter described herein proposes a combination of a voltage detector and an algorithm implemented in the electronic component (e.g., CPU) that may be used to compensate for voltage variations due to tolerances or guard bands, and may be used to detect discrepancies of underreporting or overreporting of current information by the platform VR.

    Ratio meter for temperature sensor
    8.
    发明申请
    Ratio meter for temperature sensor 有权
    温度传感器比率计

    公开(公告)号：US20100164552A1

    公开(公告)日：2010-07-01

    申请号：US12319003

    申请日：2008-12-31

    申请人： Kosta Luria ,  Joseph Shor ,  Dadashev Oleg

    发明人： Kosta Luria ,  Joseph Shor ,  Dadashev Oleg

    IPC分类号： H02M1/00 ,  H02M5/00 ,  H03K21/02

    CPC分类号： G01K7/01 ,  G01K2219/00

    摘要： In some embodiments, a new DTS implementation, which employs the conventional Vbe/ΔVbe temperature dependent principles but substitutes a voltage-to-frequency (V/F) based ratio meter for the DAC based approach. This new approach can result in a more simplified circuit that may be more variation tolerant and can require less power and area.

    摘要翻译： 在一些实施例中，新的DTS实现方案采用传统的Vbe /＆Dgr。Vbe温度依赖性原理，而将基于电压 - 频率（V / F）的比值计替换为基于DAC的方法。 这种新方法可以导致更简化的电路，其可以具有更宽的变化，并且可以要求更少的功率和面积。

    DIGITAL VOLTAGE REGULATOR INCLUDING MIXED-STACK POWER STAGE
    9.
    发明公开
    DIGITAL VOLTAGE REGULATOR INCLUDING MIXED-STACK POWER STAGE 审中-公开

    公开(公告)号：US20230205243A1

    公开(公告)日：2023-06-29

    申请号：US17561064

    申请日：2021-12-23

    申请人： Lior Gil ,  Kosta Luria ,  Michael Zelikson

    发明人： Lior Gil ,  Kosta Luria ,  Michael Zelikson

    IPC分类号： G05F1/575 ,  G05F1/595

    CPC分类号： G05F1/575 ,  G05F1/595

    摘要： Some embodiments include an apparatus including a first node in a voltage regulator, a second node in the voltage regulator, and a power stage to receive a first voltage from the first node and provide a second voltage at the second node. The power stage includes a first circuit path and a second circuit path coupled in parallel with each other between the first and second nodes. The first circuit path includes a first number of at least one transistor coupled between the first and second nodes The second circuit path includes a second number of at least one transistor between the first and second nodes. Wherein the first number is unequal to the second number.

    EFFICIENT SWITCHING OF OUTPUT STAGE POWER DRIVER
    10.
    发明申请
    EFFICIENT SWITCHING OF OUTPUT STAGE POWER DRIVER 有权

    公开(公告)号：US20220115952A1

    公开(公告)日：2022-04-14

    申请号：US17645894

    申请日：2021-12-23

    申请人： Lior Gil ,  Kosta Luria ,  Michael Zelikson

    发明人： Lior Gil ,  Kosta Luria ,  Michael Zelikson

    IPC分类号： H02M3/158 ,  H02M1/00

    摘要： The circuits and methods described herein provide technical solutions for technical problems facing power driver circuits. To reduce or eliminate effects associated with a gate capacitance discharge current and inconsistent effective Vbias, the discharge process may be split into two phases. During a first phase, the transistor gate charge is drained into ground through a large path gate. The ground (GND) features a very low impedance, hence the resulting δVbias(t)|phase_1 is negligible even for high discharge currents. The transistor gate node voltage (Vgate) is constantly monitored, and the discharge process switches from the first phase to the second phase when Vgate transgresses a bias voltage threshold based on the target value of Vbias. To switch from the first phase to the second phase, the current path into GND is cut by switching its path gate to an OFF state, and an alternative path is enabled between transistor gate charge and Vbias.