公开(公告)号：US07932639B2

公开(公告)日：2011-04-26

申请号：US11968056

申请日：2007-12-31

申请人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Luria ,  Edward R. Stanford

发明人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Luria ,  Edward R. Stanford

IPC分类号： H02J1/00

CPC分类号： H02J1/10 ,  G11C5/147 ,  H02J2001/008 ,  Y10T307/305 ,  Y10T307/658 ,  Y10T307/675

摘要： Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

摘要翻译： 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中，在集成电路和电压调节器之间交换的电压调节消息包括一个标识符，该标识符指示通过电压调节器从提供给集成电路的多个电源电压中选择的两个或多个电源电压，其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中，电压调节消息指示所指示的两个或更多个电源电压要转换到的期望电源电压电平。

公开(公告)号：US08508073B2

公开(公告)日：2013-08-13

申请号：US13551481

申请日：2012-07-17

申请人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Luria ,  Edward R. Stanford

发明人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Luria ,  Edward R. Stanford

IPC分类号： H02J1/00

CPC分类号： H02J1/10 ,  G11C5/147 ,  H02J2001/008 ,  Y10T307/305 ,  Y10T307/658 ,  Y10T307/675

摘要： Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

摘要翻译： 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中，在集成电路和电压调节器之间交换的电压调节消息包括一个标识符，该标识符指示通过电压调节器从提供给集成电路的多个电源电压中选择的两个或多个电源电压，其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中，电压调节消息指示所指示的两个或更多个电源电压要转换到的期望电源电压电平。

公开(公告)号：US20110199153A1

公开(公告)日：2011-08-18

申请号：US13094599

申请日：2011-04-26

申请人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Luria ,  Edward R. Stanford

发明人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Luria ,  Edward R. Stanford

IPC分类号： G05F3/02

CPC分类号： H02J1/10 ,  G11C5/147 ,  H02J2001/008 ,  Y10T307/305 ,  Y10T307/658 ,  Y10T307/675

摘要： Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

摘要翻译： 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中，在集成电路和电压调节器之间交换的电压调节消息包括一个标识符，该标识符指示通过电压调节器从提供给集成电路的多个电源电压中选择的两个或多个电源电压，其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中，电压调节消息指示所指示的两个或更多个电源电压要转换到的期望电源电压电平。

公开(公告)号：US20130015715A1

公开(公告)日：2013-01-17

申请号：US13551481

申请日：2012-07-17

申请人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. WeIch ,  Kosta Luria ,  Edward R. Stanford

发明人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. WeIch ,  Kosta Luria ,  Edward R. Stanford

IPC分类号： H02J1/00

CPC分类号： H02J1/10 ,  G11C5/147 ,  H02J2001/008 ,  Y10T307/305 ,  Y10T307/658 ,  Y10T307/675

摘要： Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

公开(公告)号：US20090167092A1

公开(公告)日：2009-07-02

申请号：US11968056

申请日：2007-12-31

申请人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Lurla ,  Edward R. Stanford

发明人： Hung-Piao Ma ,  Alon Naveh ,  Gil Schwarzband ,  Annabelle Pratt ,  Jorge Pedro Rodriguez ,  Joseph T. Dibene, II ,  Sean M. Welch ,  Kosta Lurla ,  Edward R. Stanford

IPC分类号： H02J1/00

CPC分类号： H02J1/10 ,  G11C5/147 ,  H02J2001/008 ,  Y10T307/305 ,  Y10T307/658 ,  Y10T307/675

摘要： Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

摘要翻译： 同时调节通过电压调节器提供给集成电路的两个或多个电源电压的方法和机制。 在本发明的一个实施例中，在集成电路和电压调节器之间交换的电压调节消息包括一个标识符，指示由电压调节器提供给集成电路的多个电源电压中选择的两个或多个电源电压，其中电压调节 消息涉及所指示的两个或更多个电源电压。 在另一个实施例中，电压调节消息指示所指示的两个或多个电源电压要转换到的期望电源电压电平。

公开(公告)号：US06483692B2

公开(公告)日：2002-11-19

申请号：US09741302

申请日：2000-12-19

申请人： David G. Figueroa ,  Huong T. Do ,  Jorge Pedro Rodriguez ,  Michael Walk

发明人： David G. Figueroa ,  Huong T. Do ,  Jorge Pedro Rodriguez ,  Michael Walk

IPC分类号： H01G220

CPC分类号： H01G2/065 ,  H01L2924/15311

摘要： A capacitor (FIGS. 6-9) includes one or more extended surface lands (604, 704, 804, 904, FIGS. 6-9). In one embodiment, each extended surface land is a land on a top or bottom surface of the capacitor, having a land length that is equal to at least 30% of the width (614, FIG. 6) of the capacitor or 20% of the length (914, FIG. 9) of the capacitor. When embedded within an integrated circuit package (1102, FIG. 11), two or more vias (1112) can be electrically connected to the extended surface lands (1108).

公开(公告)号：US06545346B2

公开(公告)日：2003-04-08

申请号：US09816665

申请日：2001-03-23

申请人： David G. Figueroa ,  Debendra Mallik ,  Jorge Pedro Rodriguez

发明人： David G. Figueroa ,  Debendra Mallik ,  Jorge Pedro Rodriguez

IPC分类号： H01L2302

CPC分类号： H01L23/49822 ,  H01L23/642 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/0401

摘要： An apparatus includes a package having a first surface and a conductive contact exposed at the first surface. A capacitor is inside the package. The capacitor has a first conductive contact exposed at a first surface of the capacitor. The first conductive contact has a first portion spanning a width of the first surface of the capacitor. The first surface of the capacitor is substantially parallel to the first surface of the package. A conductive path connects the first portion of the first conductive contact of the capacitor to the first conductive contact proximate the first surface of the package.

公开(公告)号：US06532143B2

公开(公告)日：2003-03-11

申请号：US09751612

申请日：2000-12-29

申请人： David G. Figueroa ,  Kishore K. Chakravorty ,  Huong T. Do ,  Larry Eugene Mosley ,  Jorge Pedro Rodriguez ,  Ken Brown

发明人： David G. Figueroa ,  Kishore K. Chakravorty ,  Huong T. Do ,  Larry Eugene Mosley ,  Jorge Pedro Rodriguez ,  Ken Brown

IPC分类号： H01G430

CPC分类号： H01G4/30 ,  H01L23/642 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0298 ,  H05K1/162 ,  H01L2224/0401

摘要： A capacitor includes multiple tiers (302, 304, 306, 1210, 1212, 1310, 1312, 1380, FIGS. 3, 12, 13), which provide capacitance to a load at different inductance values. Each tier includes multiple layers (311-325, 1220, 1222, 1320, 1322, 1382, FIGS. 3, 12, 13) of patterned conductive material, which are separated by layers of dielectric material. In one embodiment, tiers are stacked in a vertical direction, and are electrically connected through vias (330, 332, 334, 1230, 1232, FIGS. 3, 12) that extend through some or all of the tiers. In another embodiment, one or more tiers (1310, 1312, FIG. 13) are located in a center region (1404, FIG. 14) of the capacitor, and one or more other tiers (1380, FIG. 13) are located in a peripheral region (1408, FIG. 14) of the capacitor. In that embodiment, the center tiers and peripheral tiers are electrically connected through one or more additional layers (1370, FIG. 13) of patterned conductive material. The capacitors of the various embodiments can be used as discrete devices, which are mountable on or embeddable within a housing (e.g., a package, interposer, socket or PC board), or they can be integrally fabricated within the housing.

摘要翻译： 电容器包括多层（302,304,306,1210,1212,1310,1312,1380，图3,12,13），其以不同的电感值向负载提供电容。 每个层包括被介电材料层隔开的图案化导电材料的多层（311-325,1220,1222,1320,1322,1382，图3,12,13）。 在一个实施例中，层是沿垂直方向堆叠的，并且通过延伸穿过一些或所有层的通孔（330,332,334,1230,1232，图3,12）电连接。 在另一个实施例中，一个或多个层（1310,1312，图13）位于电容器的中心区域（1404，图14）中，并且一个或多个其他层（图13中的1380）位于 电容器的外围区域（1408，图14）。 在该实施例中，中心层和外围层通过图案化导电材料的一个或多个附加层（1370，图13）电连接。 各种实施例的电容器可以用作可安装在壳体（例如，封装，插入件，插座或PC板）中或嵌入其中的分立器件，或者它们可以一体地制造在壳体内。