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    Run level address mapping table and related method of construction
    1.
    发明申请
    Run level address mapping table and related method of construction 有权
    运行级地址映射表及相关方法

    公开(公告)号：US20060212674A1

    公开(公告)日：2006-09-21

    申请号：US11319280

    申请日：2005-12-29

    申请人： Hyun-Mo Chung ,  Hye-Young Kim ,  Chan-Ik Park

    发明人： Hyun-Mo Chung ,  Hye-Young Kim ,  Chan-Ik Park

    IPC分类号： G06F12/10 ,  G06F12/00

    CPC分类号： G06F12/0246

    摘要： A run level address mapping table and related method of construction is disclosed. The address mapping table is constructed on a run basis, e.g., a group of consecutive pages having consecutive logical or physical addresses. The run level address mapping table stores only an initial physical page number of each run and the number of the consecutive physical pages.

    摘要翻译： 公开了运行级地址映射表及相关的构造方法。 地址映射表以运行为基础构建，例如，具有连续逻辑或物理地址的一组连续页面。 运行级地址映射表仅存储每个运行的初始物理页号和连续物理页的数量。

    Address mapping table and method of storing mapping data in the same
    2.
    发明授权
    Address mapping table and method of storing mapping data in the same 有权
    地址映射表和存储映射数据的方法

    公开(公告)号：US07529880B2

    公开(公告)日：2009-05-05

    申请号：US11319280

    申请日：2005-12-29

    申请人： Hyun-Mo Chung ,  Hye-Young Kim ,  Chan-Ik Park

    发明人： Hyun-Mo Chung ,  Hye-Young Kim ,  Chan-Ik Park

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246

    摘要： A run level address mapping table and related method provides for storing address mapping data, which maps logical addresses to physical addresses in a flash memory using a flash translation layer. A first value is stored in the address mapping table, indicating an initial location for a run within a memory block, the run having at least two consecutive physical addresses. A second value is stored in the address mapping table, indicating a total size for the run.

    摘要翻译： 运行级地址映射表和相关方法提供存储地址映射数据，其使用闪存转换层将逻辑地址映射到闪速存储器中的物理地址。 第一个值存储在地址映射表中，指示存储器块内的运行的初始位置，该运行具有至少两个连续的物理地址。 第二个值存储在地址映射表中，指示运行的总大小。

    Integrated circuit memory devices that support detection of write errors occuring during power failures and methods of operating same
    3.
    发明申请
    Integrated circuit memory devices that support detection of write errors occuring during power failures and methods of operating same 审中-公开
    支持检测在电源故障期间发生写入错误的集成电路存储器件及其操作方法

    公开(公告)号：US20060069851A1

    公开(公告)日：2006-03-30

    申请号：US11020705

    申请日：2004-12-22

    申请人： Hyun-Mo Chung ,  Chan-Ik Park

    发明人： Hyun-Mo Chung ,  Chan-Ik Park

    IPC分类号： G06F13/00

    CPC分类号： G06F13/1668 ,  G06F11/1004

    摘要： Integrated circuit devices that support error detection include a non-volatile memory device having a memory array therein containing a plurality of pages of memory cells. A memory controller is also provided. The memory controller is electrically coupled to the non-volatile memory device and is configured to provide the non-volatile memory device with a plurality of segments of page data during a page write operation. The plurality of segments of page data include a plurality of segments of checksum data that identify a number of non-volatile memory cells to be programmed with write data during the page write operation. Additional checksum data is also generated for comparison and error detection purposes during a page read operation.

    摘要翻译： 支持错误检测的集成电路装置包括其中包含多页存储器单元的存储器阵列的非易失性存储器件。 还提供存储器控制器。 存储器控制器电耦合到非易失性存储器设备，并且被配置为在页写入操作期间向非易失性存储器设备提供页面数据的多个段。 页面数据的多个段包括多个校验和数据段，其识别在页写入操作期间要用写入数据编程的多个非易失性存储器单元。 在页面读取操作期间，还生成附加校验和数据用于比较和错误检测。

    MEMORY CONTROLLER AND MEMORY MANAGEMENT METHOD
    4.
    发明申请
    MEMORY CONTROLLER AND MEMORY MANAGEMENT METHOD 有权
    存储控制器和存储器管理方法

    公开(公告)号：US20110271164A1

    公开(公告)日：2011-11-03

    申请号：US13142605

    申请日：2009-11-03

    申请人： Byoung-Young Ahn ,  Hyun-Mo Chung

    发明人： Byoung-Young Ahn ,  Hyun-Mo Chung

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： G06F11/1048 ,  G11C2029/0411

    摘要： Provided is a memory controller that generates Error Correction Code (ECC) information for data based on a required reliability level predetermined based on a type of the data, that computes an ECC code for the data based on the ECC information, and that records the ECC code in a memory based on the ECC information.

    摘要翻译： 提供了一种存储器控制器，其基于基于数据类型预定的所需可靠性级别为数据生成纠错码（ECC）信息，该数据类型基于ECC信息计算数据的ECC码，并且记录ECC 基于ECC信息的存储器中的代码。

    Memory controller and memory management method
    6.
    发明授权
    Memory controller and memory management method 有权
    内存控制器和内存管理方法

    公开(公告)号：US08738987B2

    公开(公告)日：2014-05-27

    申请号：US13142605

    申请日：2009-11-03

    申请人： Byoung-Young Ahn ,  Hyun-Mo Chung

    发明人： Byoung-Young Ahn ,  Hyun-Mo Chung

    IPC分类号： H03M13/00 ,  G11C29/00

    CPC分类号： G06F11/1048 ,  G11C2029/0411

    摘要： Provided is a memory controller that generates Error Correction Code (ECC) information for data based on a required reliability level predetermined based on a type of the data, that computes an ECC code for the data based on the ECC information, and that records the ECC code in a memory based on the ECC information.

    摘要翻译： 提供了一种存储器控制器，其基于基于数据类型预定的所需可靠性级别为数据生成纠错码（ECC）信息，该数据类型基于ECC信息计算数据的ECC码，并且记录ECC 基于ECC信息的存储器中的代码。

    MEMORY DEVICE, MEMORY MANAGEMENT DEVICE, AND MEMORY MANAGEMENT METHOD
    7.
    发明申请
    MEMORY DEVICE, MEMORY MANAGEMENT DEVICE, AND MEMORY MANAGEMENT METHOD 有权
    存储器件，存储器管理器件和存储器管理方法

    公开(公告)号：US20120030435A1

    公开(公告)日：2012-02-02

    申请号：US13147403

    申请日：2009-12-02

    申请人： Hyun-Mo Chung ,  Yong-Suk Lee

    发明人： Hyun-Mo Chung ,  Yong-Suk Lee

    IPC分类号： G06F12/00

    CPC分类号： G11C29/08 ,  G01R31/28 ,  G06F17/5022 ,  G11C16/04 ,  G11C16/349 ,  G11C29/12

    摘要： Disclosed is a memory device which receives a check command and check information from a Central Processing Unit (CPU), reads data written in a predetermined area of a memory based on the check information in response to the check command, and checks a data pattern of the data read based on the check information.

    摘要翻译： 公开了一种存储装置，其从中央处理单元（CPU）接收检查命令和检查信息，响应于检查命令，基于检查信息读取写入存储器的预定区域中的数据，并且检查数据模式 基于检查信息读取数据。