THIN FILM TRANSISTOR PANEL
    1.
    发明申请
    THIN FILM TRANSISTOR PANEL 审中-公开
    薄膜晶体管面板

    公开(公告)号:US20090096950A1

    公开(公告)日:2009-04-16

    申请号:US12249684

    申请日:2008-10-10

    IPC分类号: G02F1/1368

    摘要: A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

    摘要翻译: 提供薄膜晶体管面板。 薄膜晶体管面板包括:基板; 形成在基板上的栅极线; 与栅极线绝缘并与栅极线相交的数据线; 连接到栅极线和数据线并具有漏电极的薄膜晶体管; 连接到漏电极的电容耦合电极; 以及形成在由栅极线和数据线包围的像素中的像素电极,并且包括连接到与第一像素电极分离并与电容耦合电极重叠的漏电极和第二像素电极的第一像素电极,其中, 不同像素电极的第一和第二像素电极具有左右对称结构。

    Thin film transistor panel
    2.
    发明申请
    Thin film transistor panel 有权
    薄膜晶体管面板

    公开(公告)号:US20060158576A1

    公开(公告)日:2006-07-20

    申请号:US11332279

    申请日:2006-01-13

    IPC分类号: G02F1/1343

    摘要: A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

    摘要翻译: 提供薄膜晶体管面板。 薄膜晶体管面板包括:基板; 形成在基板上的栅极线; 与栅极线绝缘并与栅极线相交的数据线; 连接到栅极线和数据线并具有漏电极的薄膜晶体管; 连接到漏电极的电容耦合电极; 以及形成在由栅极线和数据线包围的像素中的像素电极,并且包括连接到与第一像素电极分离并与电容耦合电极重叠的漏电极和第二像素电极的第一像素电极,其中, 不同像素电极的第一和第二像素电极具有左右对称结构。

    Thin film transistor panel
    3.
    发明授权
    Thin film transistor panel 有权
    薄膜晶体管面板

    公开(公告)号:US07453086B2

    公开(公告)日:2008-11-18

    申请号:US11332279

    申请日:2006-01-13

    IPC分类号: H01L29/10 G02F1/1343

    摘要: A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

    摘要翻译: 提供薄膜晶体管面板。 薄膜晶体管面板包括:基板; 形成在基板上的栅极线; 与栅极线绝缘并与栅极线相交的数据线; 连接到栅极线和数据线并具有漏电极的薄膜晶体管; 连接到漏电极的电容耦合电极; 以及形成在由栅极线和数据线包围的像素中的像素电极,并且包括连接到与第一像素电极分离并与电容耦合电极重叠的漏电极和第二像素电极的第一像素电极,其中, 不同像素电极的第一和第二像素电极具有左右对称结构。

    Thin film transistor array panel and manufacturing method thereof
    4.
    发明授权
    Thin film transistor array panel and manufacturing method thereof 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US07956943B2

    公开(公告)日:2011-06-07

    申请号:US12572231

    申请日:2009-10-01

    IPC分类号: G02F1/1343

    摘要: A thin film transistor array panel according to an embodiment includes: a substrate; a plurality of gate line formed on the substrate; a plurality of first capacitor electrodes formed on the substrate and separated from the gate lines; a plurality of data line intersecting the gate lines; a plurality of thin film transistor connected to the gate lines and the data lines; a plurality of second capacitor electrodes disposed on the first electrode; a plurality of interconnections connected to the second capacitor electrodes and the thin film transistor and disposed symmetrical to the data lines; and a plurality of pixel electrode, each pixel electrode including a first subpixel electrode connected to one of the thin film transistors and a second subpixel electrode connected to one of the first capacitor electrodes.

    摘要翻译: 根据实施例的薄膜晶体管阵列面板包括:基板; 形成在所述基板上的多个栅极线; 形成在所述基板上并与所述栅极线分离的多个第一电容电极; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 设置在所述第一电极上的多个第二电容器电极; 连接到第二电容器电极和薄膜晶体管并且与数据线对称设置的多个互连; 以及多个像素电极,每个像素电极包括连接到所述薄膜晶体管之一的第一子像素电极和连接到所述第一电容器电极之一的第二子像素电极。

    Thin film transisitor array panel and manufacturing method thereof

    公开(公告)号:US07916226B2

    公开(公告)日:2011-03-29

    申请号:US12572231

    申请日:2009-10-01

    IPC分类号: G02F1/1343

    摘要: A thin film transistor array panel according to an embodiment includes: a substrate; a plurality of gate line formed on the substrate; a plurality of first capacitor electrodes formed on the substrate and separated from the gate lines; a plurality of data line intersecting the gate lines; a plurality of thin film transistor connected to the gate lines and the data lines; a plurality of second capacitor electrodes disposed on the first electrode; a plurality of interconnections connected to the second capacitor electrodes and the thin film transistor and disposed symmetrical to the data lines; and a plurality of pixel electrode, each pixel electrode including a first subpixel electrode connected to one of the thin film transistors and a second subpixel electrode connected to one of the first capacitor electrodes.

    Thin film transistor array panel and manufacturing method thereof
    6.
    发明授权
    Thin film transistor array panel and manufacturing method thereof 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US07619694B2

    公开(公告)日:2009-11-17

    申请号:US11246461

    申请日:2005-10-06

    IPC分类号: G02F1/1343

    摘要: A thin film transistor array panel according to an embodiment includes: a substrate; a plurality of gate line formed on the substrate; a plurality of first capacitor electrodes formed on the substrate and separated from the gate lines; a plurality of data line intersecting the gate lines; a plurality of thin film transistor connected to the gate lines and the data lines; a plurality of second capacitor electrodes disposed on the first electrode; a plurality of interconnections connected to the second capacitor electrodes and the thin film transistor and disposed symmetrical to the data lines; and a plurality of pixel electrode, each pixel electrode including a first subpixel electrode connected to one of the thin film transistors and a second subpixel electrode connected to one of the first capacitor electrodes.

    摘要翻译: 根据实施例的薄膜晶体管阵列面板包括:基板; 形成在所述基板上的多个栅极线; 形成在所述基板上并与所述栅极线分离的多个第一电容电极; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 设置在所述第一电极上的多个第二电容器电极; 连接到第二电容器电极和薄膜晶体管并且与数据线对称设置的多个互连; 以及多个像素电极,每个像素电极包括连接到所述薄膜晶体管之一的第一子像素电极和连接到所述第一电容器电极之一的第二子像素电极。

    Array substrate, manufacturing method thereof and display device having the same
    9.
    发明申请
    Array substrate, manufacturing method thereof and display device having the same 有权
    阵列基板及其制造方法以及具有该基板的显示装置

    公开(公告)号:US20060023134A1

    公开(公告)日:2006-02-02

    申请号:US11175254

    申请日:2005-07-07

    IPC分类号: G02F1/1343

    摘要: A first pixel electrode and a second pixel are formed in a pixel area. The first pixel electrode is coupled to the second pixel electrode via a coupling capacitance. A voltage is applied to the second pixel electrode from the first pixel electrode through the coupling capacitance. Therefore the voltage applied to the second pixel electrode depends on the voltage applied to the first pixel electrode and the two voltages have a certain ratio. Applying two different voltages in a pixel area can improve display quality.

    摘要翻译: 第一像素电极和第二像素形成在像素区域中。 第一像素电极经由耦合电容耦合到第二像素电极。 电压通过耦合电容从第一像素电极施加到第二像素电极。 因此,施加到第二像素电极的电压取决于施加到第一像素电极的电压,并且两个电压具有一定的比率。 在像素区域中应用两种不同的电压可以提高显示质量。

    Thin film transistor array panel and repairing method therefor
    10.
    发明申请
    Thin film transistor array panel and repairing method therefor 审中-公开
    薄膜晶体管阵列面板及其修复方法

    公开(公告)号:US20060126004A1

    公开(公告)日:2006-06-15

    申请号:US11300320

    申请日:2005-12-13

    IPC分类号: G02F1/13

    CPC分类号: G02F1/136259

    摘要: A method of repairing a thin film transistor array panel is provided. The thin film transistor array panel includes a gate line, a data line intersecting the gate line, a thin film transistor connected to the gate line and the data line and having a drain electrode, a pixel electrode including at least one first subpixel electrode connected to the drain electrode of the thin film transistor and a second subpixel electrode capacitively coupled to the at least one first subpixel electrode. The repairing method according to an embodiment of the present invention includes: disconnecting at least one of the second subpixel electrode and the at least one first subpixel electrode from the thin film transistor.

    摘要翻译: 提供修复薄膜晶体管阵列面板的方法。 薄膜晶体管阵列面板包括栅极线,与栅极线相交的数据线,连接到栅极线和数据线的薄膜晶体管,并具有漏极,像素电极,包括至少一个第一子像素电极,其连接到 所述薄膜晶体管的漏电极和与所述至少一个第一子像素电极电容耦合的第二子像素电极。 根据本发明的实施例的修复方法包括:从薄膜晶体管断开第二子像素电极和至少一个第一子像素电极中的至少一个。