公开(公告)号：US06391757B1

公开(公告)日：2002-05-21

申请号：US09875508

申请日：2001-06-06

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Yeong-Song Yen ,  Ching-Hsu Chang

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Yeong-Song Yen ,  Ching-Hsu Chang

IPC分类号： H01L2144

CPC分类号： H01L21/76835 ,  H01L21/76808 ,  H01L2221/1031

摘要： A dual damascene process involves forming a first passivation layer, a first dielectric layer and a second passivation layer on a substrate of a semiconductor wafer. A first lithography and etching process is performed to form at least one via hole in the second passivation layer and the first dielectric layer. Thereafter, a second dielectric layer and a third passivation layer are formed on the surface of the semiconductor wafer followed by performing a second lithography and etching process to form at least one trench in the third passivation layer and the second dielectric layer. The trench and the via hole together construct a dual damascene structure. Finally, a barrier layer and a metal layer are formed on the surface of the semiconductor wafer, and a chemical-mechanical-polishing (CMP) process is performed to complete the dual damascene process.

摘要翻译： 双镶嵌工艺包括在半导体晶片的衬底上形成第一钝化层，第一介电层和第二钝化层。 执行第一光刻和蚀刻工艺以在第二钝化层和第一介电层中形成至少一个通孔。 此后，在半导体晶片的表面上形成第二电介质层和第三钝化层，随后进行第二光刻和蚀刻工艺，以在第三钝化层和第二介电层中形成至少一个沟槽。 沟槽和通孔一起构成双镶嵌结构。 最后，在半导体晶片的表面上形成阻挡层和金属层，进行化学机械抛光（CMP）工艺以完成双镶嵌工艺。

公开(公告)号：US06839126B2

公开(公告)日：2005-01-04

申请号：US10033891

申请日：2002-01-03

申请人： Yeong-Song Yen ,  I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung ,  Ching-Hsu Chang

发明人： Yeong-Song Yen ,  I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung ,  Ching-Hsu Chang

IPC分类号： G03F7/20 ,  G03B27/74 ,  G03B27/42 ,  G03B27/54

CPC分类号： G03F7/70141 ,  G03F7/70425 ,  G03F7/70466

摘要： A photolithography process with multiple exposures is provided. A photomask is placed and aligned above a wafer having a photoresist formed thereon at a predetermined distance. Multiple exposures are sequentially performed on the photoresist through the photomask. Each of the multiple exposures is provided with a respective illuminating setting that is optimized for one duty ratio of the photomask. Thereby, an optimum through-pitch performance for pattern transfer from the photomask unto the photoresist is obtained. Then, a development is performed on the photoresist.

公开(公告)号：US06589881B2

公开(公告)日：2003-07-08

申请号：US09997339

申请日：2001-11-27

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung ,  Ching-Hsu Chang

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung ,  Ching-Hsu Chang

IPC分类号： H01L21302

CPC分类号： H01L21/76835 ,  H01L21/76807 ,  H01L21/76813

摘要： A method of forming a dual damascene structure. A substrate having a conductive layer thereon is provided. A passivation layer, a first dielectric layer, an etching stop layer, a second dielectric layer and cap layer serving as a base anti-reflection coating are sequentially formed over the substrate. The cap layer and the second dielectric layer are patterned to form a first opening that exposes a portion of the etching stop layer. A patterned negative photoresist layer having a second opening therein is formed above the cap layer. The cap layer exposed by the second opening and the second dielectric layer exposed by the first opening are removed. Thereafter, the second dielectric layer exposed by the second opening is removed to form a trench and the first dielectric layer exposed by the first opening is removed to form a via opening. The passivation layer exposed by via opening and then the negative photoresist layer is removed. A conformal barrier layer and a conductive layer are sequentially formed over the trench and the via opening with the conductive layer, completely filling the trench and the via opening.

摘要翻译： 形成双镶嵌结构的方法。 提供其上具有导电层的基板。 在衬底上顺序形成钝化层，第一介电层，蚀刻停止层，第二电介质层和用作基底防反射涂层的覆盖层。 将盖层和第二介电层图案化以形成暴露蚀刻停止层的一部分的第一开口。 在其上方形成了具有第二开口的图案化的负性光致抗蚀剂层。 除去由第二开口暴露的盖层和由第一开口露出的第二介质层。 此后，除去由第二开口露出的第二电介质层以形成沟槽，并且去除由第一开口暴露的第一电介质层以形成通孔。 去除通过开口暴露的钝化层，然后去除负的光致抗蚀剂层。 在沟槽和通孔开口上依次形成保形阻挡层和导电层，导电层完全填充沟槽和通孔。

公开(公告)号：US06337269B1

公开(公告)日：2002-01-08

申请号：US09885042

申请日：2001-06-21

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung

IPC分类号： H01L214763

CPC分类号： H01L21/76811 ,  H01L21/76804 ,  H01L21/76813

摘要： The present invention fabricates a dual damascene structure. A passivation layer, a first dielectric layer, a second passivation layer, a second dielectric layer, a third passivation layer and a third dielectric layer are formed on the surface of the semiconductor wafer followed by etching the third dielectric layer to form a pattern of an upper trench of the dual damascene structure. Then the third passivation layer and the second dielectric layer are etched down to the surface of the second passivation layer so as to form a pattern of a via hole of the dual damascene structure. Thereafter, the third passivation layer and the second passivation layer not covered by the third dielectric layer and the second dielectric layer are removed. The third dielectric layer and the second passivation layer are used as hard masks to remove the second dielectric layer and the first dielectric layer until the surface of the first passivation layer. Finally, the second passivation layer and the first passivation layer not covered by the second dielectric layer and the first dielectric layer are removed to the surface of the conductive layer so completing the process of fabricating the dual damascene structure.

摘要翻译： 本发明制造双镶嵌结构。 在半导体晶片的表面上形成钝化层，第一介电层，第二钝化层，第二介电层，第三钝化层和第三介电层，然后蚀刻第三介电层，形成图案 双层镶嵌结构的上沟槽。 然后，将第三钝化层和第二介电层向下蚀刻到第二钝化层的表面，以形成双镶嵌结构的通孔的图案。 此后，除去未被第三电介质层和第二电介质层覆盖的第三钝化层和第二钝化层。 第三介电层和第二钝化层用作硬掩模以去除第二介电层和第一介电层直到第一钝化层的表面。 最后，将第二钝化层和未被第二介电层和第一介电层覆盖的第一钝化层除去到导电层的表面，从而完成制造双镶嵌结构的工艺。

公开(公告)号：US06664028B2

公开(公告)日：2003-12-16

申请号：US09729575

申请日：2000-12-04

申请人： Jiunn-Ren Hwang ,  I-Hsiung Huang

发明人： Jiunn-Ren Hwang ,  I-Hsiung Huang

IPC分类号： G03C556

CPC分类号： G03F7/0035 ,  G03F7/40

摘要： A method of forming an opening in a wafer layer. At least two patterned photoresist layers are formed on a wafer layer. Using different photoresist layers, many openings are defined. The wafer layer is then etched to form the opening. Each photoresist layer has a parallel linear pattern such as parallel strips or an array of rectangular blocks. The photoresist layers are superposed in a way that spaces between the patterns for each photoresist layers overlapped with each other for form openings that expose the underlying wafer layers. The wafer layer exposed in the openings is then etched to form contact/via holes without rounded corners while the rounded profiles has been cancelled by the superposition of the photoresist layers.

公开(公告)号：US06380077B1

公开(公告)日：2002-04-30

申请号：US09835199

申请日：2001-04-13

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang

IPC分类号： H01L214763

CPC分类号： H01L21/31144 ,  G03F7/0035 ,  H01L21/0271 ,  H01L21/76816

摘要： A method of forming a contact opening. A substrate having a conductive structure and a dielectric layer thereon is provided. A first photoresist layer is formed over the dielectric layer. A first photo-exposure followed by a photoresist development is conducted so that an opening pattern on the photomask is transferred to the first photoresist layer. The first photoresist layer includes a first opening that exposes a portion of the dielectric layer. A second photoresist layer is formed over the patterned first photoresist layer. The photomask is shifted horizontally relative to the substrate. A second photo-exposure followed by a photoresist development is conducted so that the opening pattern on the photomask is transferred to the second photoresist layer. The second photoresist layer includes a second opening that exposes a portion of the first photoresist layer and a portion of the first opening. Thereafter, using the first and the second photoresist layer as a mask, a portion of the dielectric layer is removed until a contact opening that exposes a portion of the conductive structure is formed. The first and the second photoresist layer are then removed, followed by forming a glue layer over the substrate to conform with a profile of the contact opening. Finally, the contact opening is filled with a metal plug.

摘要翻译： 一种形成接触开口的方法。 提供具有导电结构和其上的电介质层的衬底。 在电介质层上形成第一光致抗蚀剂层。 进行第一次曝光，然后进行光致抗蚀剂显影，使得光掩模上的开口图案被转印到第一光致抗蚀剂层。 第一光致抗蚀剂层包括暴露介电层的一部分的第一开口。 在图案化的第一光致抗蚀剂层上形成第二光致抗蚀剂层。 光掩模相对于基板水平移动。 进行第二次曝光，然后进行光致抗蚀剂显影，使得光掩模上的开口图案被转印到第二光致抗蚀剂层。 第二光致抗蚀剂层包括暴露第一光致抗蚀剂层的一部分和第一开口的一部分的第二开口。 此后，使用第一和第二光致抗蚀剂层作为掩模，去除电介质层的一部分，直到形成露出导电结构的一部分的接触开口。 然后去除第一和第二光致抗蚀剂层，随后在衬底上形成胶层以符合接触孔的轮廓。 最后，接触开口填充有金属塞。

公开(公告)号：US06316340B1

公开(公告)日：2001-11-13

申请号：US09721148

申请日：2000-11-22

申请人： Jiunn-Ren Hwang ,  I-Hsiung Huang

发明人： Jiunn-Ren Hwang ,  I-Hsiung Huang

IPC分类号： H01L21425

CPC分类号： H01L21/0274 ,  G03F7/0035 ,  Y10S438/947

摘要： A photolithographic process for preventing the rounding of the corners of a pattern. A silicon wafer is provided. A first photoresist layer is formed over the silicon wafer and then patterned to form a first group of mutually parallel photoresist lines along a first direction. A second photoresist layer is formed over the silicon wafer and then patterned to form a second group of mutually parallel photoresist lines along a second direction. The first direction and the second direction are on the same plane but mutually perpendicular.

摘要翻译： 一种用于防止图案的角部倒圆的光刻工艺。 提供硅晶片。 第一光致抗蚀剂层形成在硅晶片之上，然后被图案化以沿着第一方向形成第一组相互平行的光致抗蚀剂线。 第二光致抗蚀剂层形成在硅晶片之上，然后被图案化以沿着第二方向形成第二组相互平行的光致抗蚀剂线。 第一方向和第二方向在同一平面上但相互垂直。

公开(公告)号：US06680163B2

公开(公告)日：2004-01-20

申请号：US10328769

申请日：2002-12-23

申请人： Jiunn-Ren Hwang ,  I-Hsiung Huang

发明人： Jiunn-Ren Hwang ,  I-Hsiung Huang

IPC分类号： G03C556

CPC分类号： G03F7/0035 ,  G03F7/40

摘要： A method of forming an opening in a wafer layer is described. At least two patterned photoresist layers are formed on a wafer layer. Each photoresist layer comprises patterns of various configurations. The photoresist layers are stacked to form an opening pattern that expose the underlying wafer layer by superpositioning the space between the patterns in the first photoresist layer and the space between the patterns in the second photoresist layer. The wafer layer exposed by the opening pattern is then etched to form an opening.

摘要翻译： 描述了在晶片层中形成开口的方法。 至少两个图案化的光致抗蚀剂层形成在晶片层上。 每个光致抗蚀剂层包括各种配置的图案。 层叠光致抗蚀剂层以形成通过叠加第一光致抗蚀剂层中的图案之间的空间和第二光致抗蚀剂层中的图案之间的空间来暴露下面的晶片层的开口图案。 然后蚀刻由开口图案曝光的晶片层以形成开口。

公开(公告)号：US06656667B2

公开(公告)日：2003-12-02

申请号：US09835013

申请日：2001-04-13

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang

IPC分类号： G03F700

CPC分类号： G03F7/0035

摘要： A multiple resist layer photolithographic process. A substrate having an insulation layer and a first photoresist layer sequentially stacked thereon is provided. A first light-exposure is conducted to transfer a pattern on a photomask to the first photoresist layer, thereby forming a first exposure pattern. A post-exposure baking is carried out and then the first photoresist layer is developed. A second photoresist layer is formed over the patterned first photoresist layer. A second photo-exposure is conducted to transfer the pattern on the same photomask to the second photoresist layer, thereby forming a second exposure pattern. The second exposure pattern and the first exposure pattern are aligned. Finally, the second photoresist layer is developed.

公开(公告)号：US06579790B1

公开(公告)日：2003-06-17

申请号：US09707314

申请日：2000-11-06

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang

IPC分类号： H01L214763

CPC分类号： H01L21/76811 ,  H01L21/0274

摘要： A method of fabricating a dual damascene opening in a dielectric layer above a substrate. A first photoresist layer having a first opening therein is formed over the dielectric layer. The first opening exposes the dielectric layer at a position where a via is desired. A buffer layer is formed over the first photoresist layer. A second photoresist layer having a second opening is formed over the buffer layer. The second opening exposes the area where a conductive wire is desired. The first opening and the second opening together form a metallic interconnect structure. Using the first and the second photoresist layer as a mask, a dual damascene structural opening that includes a via opening and a conductive wire trench is formed in the dielectric layer.

摘要翻译： 在衬底上方的电介质层中制造双镶嵌开口的方法。 在电介质层上方形成有第一开口的第一光致抗蚀剂层。 第一开口将电介质层暴露在期望通孔的位置处。 在第一光致抗蚀剂层上形成缓冲层。 在缓冲层上形成具有第二开口的第二光致抗蚀剂层。 第二个开口露出需要导线的区域。 第一开口和第二开口一起形成金属互连结构。 使用第一和第二光致抗蚀剂层作为掩模，在电介质层中形成包括通孔开口和导线沟槽的双镶嵌结构开口。