公开(公告)号：US3899373A

公开(公告)日：1975-08-12

申请号：US47140174

申请日：1974-05-20

Applicant: IBM

Inventor： ANTIPOV IGOR

IPC: H01L29/78 ,  H01L21/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/00 ,  H01L29/417 ,  H01L21/265

CPC classification number: H01L21/00 ,  H01L21/28525 ,  H01L29/00 ,  Y10S148/053 ,  Y10S148/117 ,  Y10S148/122

Abstract: A method for fabricating an insulated gate field effect transistor device which results in a doped polysilicon gate electrode which gate structure can be used for additional interconnection purposes. The method includes forming a thin blanket layer of an insulating material on a semiconductor substrate having source and drain regions and a surface insulating layer, depositing a blanket layer of polysilicon, depositing a blanket layer of Si3N4 and selectively removing leaving areas over the gate region and any desired interconnection pattern, oxidizing the exposed areas of the polysilicon layer, removing the remaining areas of Si3N4, and fabricating a passivation layer and an interconnection metallurgy system on the surface.

Abstract translation: 一种用于制造绝缘栅场效应晶体管器件的方法，其导致掺杂多晶硅栅电极，栅极结构可用于额外的互连目的。 该方法包括在具有源极和漏极区域的半导体衬底上形成绝缘材料的薄橡皮布层和表面绝缘层，沉积多晶硅的覆盖层，沉积Si 3 N 4的覆盖层并选择性地去除栅极区域上的离开区域，以及 任何期望的互连图案，氧化多晶硅层的暴露区域，去除Si3N4的剩余区域，以及在表面上制造钝化层和互连冶金系统。

公开(公告)号：US3507036A

公开(公告)日：1970-04-21

申请号：US3507036D

申请日：1968-01-15

Applicant: IBM

Inventor： ANTIPOV IGOR ,  FEINBERG IRVING ,  ZANDE CHARLES H VAN DE ,  WING WAILEY L ,  BERGER HORST H

IPC: H01L23/544 ,  H01L7/02

CPC classification number: H01L22/34