公开(公告)号：US3893070A

公开(公告)日：1975-07-01

申请号：US43153074

申请日：1974-01-07

Applicant: IBM

Inventor： BOSSEN DOUGLAS C ,  CORDI VINCENT A ,  HSIAO MU-YUE ,  SHIFFRIN BARRY N ,  GLICK ELLIS W

IPC: G06F12/16 ,  G06F11/10 ,  H03M13/00 ,  H04L1/10

CPC classification number: G06F11/1048

Abstract: An error correction and detection circuit includes a modular encoder that provides the minimum number of check bits for encoding a particular number of data bits. Means is provided for combining several units to produce the minimum number of code bits when a larger data word is to be encoded. A storage hierarchy system using this error correction circuit is also disclosed.

Abstract translation: 纠错和检测电路包括一个模块化编码器，其提供用于编码特定数量的数据位的最小数量的校验位。 提供了用于组合几个单元以在要编码较大数据字时产生最小数量的码位的装置。 还公开了一种使用该纠错电路的存储层级系统。