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    Method and apparatus for adding or subtracting in an associative memory
    1.
    发明授权
    Method and apparatus for adding or subtracting in an associative memory 失效
    用于在相关记忆中添加或放置的方法和装置

    公开(公告)号：US3576436A

    公开(公告)日：1971-04-27

    申请号：US3576436D

    申请日：1968-10-16

    Applicant: IBM

    Inventor： LINDQUIST ARWIN B

    IPC: G11C15/04 ,  G06F7/38 ,  G11C15/00

    CPC classification number: G11C15/04

    Abstract: Disclosed is a method and apparatus for simultaneously adding or subtracting a number from one or more words in an associative memory. The apparatus includes an entry register containing information to be compared with or read into the words in the memory, a mask register for selecting which bits in the entry register will be gated to the words in the associative memory, a backup register for storing the contents of the entry and other registers and backup gates responsive to the contents of the backup register and sequential control signals for establishing in each cycle the correct contents within the mask and entry registers. With the above associative memory apparatus, the method of adding a number to each selected word in memory is carried out by complementing in each memory word the lowest-order 0 and all 1 bits to the right (lower order) of it. The method of subtracting a number from each selected word in memory is carried out by complementing in each word the lowest-order 1 and all 0 bits to the right (lower order) of it. The method is carried out simultaneously for all words in memory using only one interrogate and one write step for each bit within a memory word.

    Associative memory system with match,no match and multiple match resolution
    5.
    发明授权
    Associative memory system with match,no match and multiple match resolution 失效
    具有匹配，无匹配和多个匹配分辨率的相关记忆系统

    公开(公告)号：US3602899A

    公开(公告)日：1971-08-31

    申请号：US3602899D

    申请日：1969-06-20

    Applicant: IBM

    Inventor： LINDQUIST ARWIN B ,  PRICER WILBUR D ,  SEEBER ROBERT R

    IPC: G11C15/04 ,  G11C15/00

    CPC classification number: G11C15/04

    Abstract: An associative memory matrix having a writable portion made up of bistable memory cells and a read-only portion made up of monostable memory cells. The memory may be used as a conventional memory by placing an address in the address field of an entry register, masking out all other bits and performing a match interrogation with the unmasked bits. Since the contents of the address portion (read-only memory) of each stored word are unique, the interrogation results in a single match at the location containing the address sought. Included is a circuit for determining whether no match, one match, or a multiple match has occurred.

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