公开(公告)号：US3615466A

公开(公告)日：1971-10-26

申请号：US3615466D

申请日：1968-11-19

Applicant: IBM

Inventor： SAHNI RAVINDER J

IPC: D06F15/00 ,  H01J9/233 ,  H01L21/00 ,  H01L21/32 ,  H01L21/82 ,  G03C5/04

CPC classification number: H01L21/32 ,  D06F15/00 ,  H01L21/00 ,  H01L21/82 ,  Y10S438/942

Abstract: Defect-free integrated circuit patterns in masks which are overlayed by a mask matching process used for different processing steps to expose photoresist in arrays of patterns for semiconductor circuits on a wafer may be weighted prior to matching in accordance with different process yield regions of the array. Weighting the defect-free patterns in this manner provides a way of concentrating the defect-free locations in the masks in the high process yield regions of the wafer.

公开(公告)号：US3615464A

公开(公告)日：1971-10-26

申请号：US3615464D

申请日：1968-11-19

Applicant: IBM

Inventor： AGUSTA BENJAMIN ,  SAHNI RAVINDER J

IPC: D06F15/00 ,  H01J9/233 ,  H01L21/00 ,  H01L21/32 ,  H01L21/82 ,  G03C5/04

CPC classification number: H01L21/32 ,  D06F15/00 ,  H01L21/00 ,  H01L21/82 ,  Y10S438/942

Abstract: The relative number of masks required in different levels in a mask matching process used for different processing steps to expose photoresist in arrays of patterns for semiconductor circuits on a wafer may be determined on the basis of the average number of random defects in the mask levels. This provides a way to decrease the number of comparisons that need to e made in a mask matching process without lowering the increased yield of defect-free patterns on the substrate obtained through mask matching.