-
公开(公告)号:US3235754A
公开(公告)日:1966-02-15
申请号:US15558361
申请日:1961-11-29
Applicant: IBM
Inventor: BUELOW FRED K , TURNBULL JR JOHN R
IPC: H03K19/013 , H03K19/086 , H03K19/10
CPC classification number: H03K19/086 , H03K19/013 , H03K19/10
-
公开(公告)号:US3405285A
公开(公告)日:1968-10-08
申请号:US45591165
申请日:1965-05-14
Applicant: IBM
Inventor: WALSH JAMES L , TURNBULL JR JOHN R
IPC: H03K17/60 , H03K19/013 , H03K19/086
CPC classification number: H03K19/013 , H03K17/603 , H03K19/086
-
3.Logic circuits utilizing a cross-connection between complementary outputs 失效
Title translation: 利用互补输出之间的交叉连接的逻辑电路公开(公告)号:US3277289A
公开(公告)日:1966-10-04
申请号:US33473063
申请日:1963-12-31
Applicant: IBM
Inventor: BUELOW FRED K , MURPHY DANIEL W , TURNBULL JR JOHN R
IPC: H03K19/10
CPC classification number: H03K19/10
-
-