Non-conformal plasma deposited SiN for ISP

    公开(公告)号:US20250151375A1

    公开(公告)日:2025-05-08

    申请号:US18934622

    申请日:2024-11-01

    Applicant: IMEC VZW

    Abstract: A method for processing a CFET device is provided that includes: (i) forming a fin structure that includes a first layer stack below a second layer stack, the first layer stack including a first channel layer and the second layer stack including a second channel layer; (ii) forming a set of gate structures around the fin structure and perpendicular to the fin structure and spaced apart from each other, the set of gate structures covering the fin structure in channel regions and exposing the fin structure in fin cut regions that alternate with the channel regions; (iii) at least partially removing the fin structure in the fin cut regions to form preliminary fin cuts; and (iv) forming a cover layer which partially covers side walls of recess(es) formed by the preliminary fin cuts

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