公开(公告)号：US11423292B2

公开(公告)日：2022-08-23

申请号：US16860381

申请日：2020-04-28

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Kuo-Chiang Chang ,  Shien-Chun Luo

IPC: G06F13/40 ,  G06N3/063 ,  G06F9/38 ,  G06F9/30 ,  G06F9/48

Abstract: A convolutional neural-network calculating apparatus including a bidirectional-output operation module and a data scheduler is provided. The bidirectional-output operation module includes a number of bidirectional-output operators, a number of row-output accumulators, and a number of column-output accumulators. Each bidirectional-output operator has a row-output port and a column-output port. The row-output accumulators are coupled to the row-output ports, and the column-output accumulators are coupled to the corresponding column-output ports. The data scheduler is configured to provide a number of values of an input data and a number of convolution values of the convolution kernels to the bidirectional-output operators. In a first operation mode, the bidirectional-output operators output operation results to the corresponding column-output accumulators through the column-output ports. In a second operation mode, the bidirectional-output operators output operation results to the row-output accumulators through the row-output ports.

公开(公告)号：US11645365B2

公开(公告)日：2023-05-09

申请号：US16731695

申请日：2019-12-31

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Shien-Chun Luo ,  Po-Wei Chen

IPC: G06F9/38 ,  G06N3/08 ,  G06F18/2413 ,  G06F9/30 ,  G06F1/3203 ,  G06T3/40

CPC classification number: G06F18/24133 ,  G06F1/3203 ,  G06F9/3005 ,  G06F9/3877 ,  G06N3/08 ,  G06T3/4046 ,  G06F2209/5011

Abstract: A convolutional neural network (CNN) operation accelerator comprising a first sub-accelerator and a second sub-accelerator is provided. The first sub-accelerator comprises I units of CNN processor cores, J units of element-wise & quantize processors, and K units of pool and nonlinear function processor. The second sub-accelerator comprises X units of CNN processor cores, Y units of first element-wise & quantize processors, and Z units of pool and nonlinear function processor. The above variables I˜K, X˜Z are all greater than 0, and at least one of the three relations, namely, “I is different from X”, “J is different from Y”, and “K is different from Z”, is satisfied. A to-be-performed CNN operation comprises a first partial CNN operation and a second partial CNN operation. The first sub-accelerator and the second sub-accelerator perform the first partial CNN operation and the second partial CNN operation, respectively.

公开(公告)号：US08952740B2

公开(公告)日：2015-02-10

申请号：US14019554

申请日：2013-09-06

Applicant: Industrial Technology Research Institute

Inventor： Shien-Chun Luo

IPC: H03K3/00 ,  H03K3/012 ,  H03K3/356 ,  H03K5/05

CPC classification number: H03K3/012 ,  H03K3/356156 ,  H03K5/05

Abstract: A pulsed latching apparatus and a method for generating a pulse signal are provided. The pulsed latching apparatus consists of a pulsed latch and a pulse signal generator. A data input terminal of the pulsed latch receives input data, the pulsed latch latches the input data according to a pulse signal, and transmits the latched input data through the data output terminal to serve as output data. The pulse signal generator duplicates a data transmission delay between the data input terminal and the data output terminal of the pulsed latch to obtain a duplicated delay. The pulse signal generator receives a clock signal, and processes the clock signal according to the duplicated delay to generate the pulse signal.

Abstract translation: 提供脉冲锁存装置和产生脉冲信号的方法。 脉冲闭锁装置由脉冲锁存器和脉冲信号发生器组成。 脉冲锁存器的数据输入端接收输入数据，脉冲锁存器根据脉冲信号锁存输入数据，并通过数据输出端发送锁存输入数据，作为输出数据。 脉冲信号发生器复制脉冲锁存器的数据输入端和数据输出端之间的数据传输延迟，以获得重复的延迟。 脉冲信号发生器接收时钟信号，并根据复制的延迟处理时钟信号以产生脉冲信号。

公开(公告)号：US08901964B2

公开(公告)日：2014-12-02

申请号：US14060329

申请日：2013-10-22

Applicant: Industrial Technology Research Institute

Inventor： Shien-Chun Luo

IPC: H03K19/0175 ,  H03K19/00

CPC classification number: H03K19/0013

Abstract: A level shifter transfers a first voltage signal to a second voltage signal. The level shifter comprises a comparison circuit, a delay circuit, and a selection circuit. The comparison circuit generates a first signal according to the comparison result between the first voltage signal and the reverse-phase signal of the first voltage signal. The delay circuit generates a second signal according to the first voltage signal. The selection circuit receives the first and the second signals and chooses the higher voltage one from the first signal and the second signal to be the second voltage signal.

Abstract translation: 电平移位器将第一电压信号传送到第二电压信号。 电平移位器包括比较电路，延迟电路和选择电路。 比较电路根据第一电压信号和第一电压信号的反相信号之间的比较结果产生第一信号。 延迟电路根据第一电压信号产生第二信号。 选择电路接收第一和第二信号，并从第一信号和第二信号中选择较高的电压作为第二电压信号。

公开(公告)号：US20140218092A1

公开(公告)日：2014-08-07

申请号：US14019554

申请日：2013-09-06

Applicant: Industrial Technology Research Institute

Inventor： Shien-Chun Luo

IPC: H03K3/017

CPC classification number: H03K3/012 ,  H03K3/356156 ,  H03K5/05

Abstract: A pulsed latching apparatus and a method for generating a pulse signal are provided. The pulsed latching apparatus consists of a pulsed latch and a pulse signal generator. A data input terminal of the pulsed latch receives input data, the pulsed latch latches the input data according to a pulse signal, and transmits the latched input data through the data output terminal to serve as output data. The pulse signal generator duplicates a data transmission delay between the data input terminal and the data output terminal of the pulsed latch to obtain a duplicated delay. The pulse signal generator receives a clock signal, and processes the clock signal according to the duplicated delay to generate the pulse signal.

Abstract translation: 提供脉冲锁存装置和产生脉冲信号的方法。 脉冲闭锁装置由脉冲锁存器和脉冲信号发生器组成。 脉冲锁存器的数据输入端接收输入数据，脉冲锁存器根据脉冲信号锁存输入数据，并通过数据输出端发送锁存输入数据，作为输出数据。 脉冲信号发生器复制脉冲锁存器的数据输入端和数据输出端之间的数据传输延迟，以获得重复的延迟。 脉冲信号发生器接收时钟信号，并根据复制的延迟处理时钟信号以产生脉冲信号。