公开(公告)号：US11955417B2

公开(公告)日：2024-04-09

申请号：US17550602

申请日：2021-12-14

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Tsung-Yi Hung ,  Shih-Hsien Wu

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49827 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

Abstract: An electronic device includes a substrate, an upper conductive layer, and a lower conductive layer. The substrate has a plurality of inner vias and has an upper surface and a lower surface. The upper conductive layer includes an upper ground trace and an upper signal pad disposed on the upper surface. The upper ground trace is electrically connected to the ground vias and has an upper hollow portion exposing a part of the upper surface. The upper signal pad is disposed on the part of the upper surface exposed by the upper hollow portion and electrically connected to the signal via. The lower conductive layer includes a lower ground trace and a lower signal pad disposed on the lower surface. The lower conductive trace is electrically connected to the ground vias and has a lower hollow portion exposing a part of the lower surface. The lower signal pad is disposed on the part of the lower surface exposed by the lower hollow portion and electrically connected to the signal via.