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    Reconfigurable data bus system and method thereof
    3.
    发明授权
    Reconfigurable data bus system and method thereof 有权

    公开(公告)号：US11061694B2

    公开(公告)日：2021-07-13

    申请号：US16677301

    申请日：2019-11-07

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Chien-Min Hsu ,  Shih-Hsien Wu

    IPC: G06F9/445 ,  G06N3/08 ,  G06N3/04 ,  G06F13/20 ,  G06N3/063 ,  G06F13/40

    Abstract: A reconfigurable data bus system comprises a driver, a receiver, a data bus and a detector. The driver stores an electrical parameter data base. The electrical parameter data base includes a plurality of different signal-to-ground ratios and a plurality of signal quality parameters corresponding to the signal-to-ground ratios. The data bus includes a plurality of signal lines electrically connected between the driver and the receiver. The detector is electrically connected to the data bus and the driver. The detector is configured to detect a current signal quality parameter of the data bus and transmit the current signal quality parameter to the driver. The driver is selectively reconfigured a current signal-to-ground ratio according to a current signal quality parameter of the data bus and the electrical parameter database.

    Differential signal transmitting circuit board
    4.
    发明授权
    Differential signal transmitting circuit board 有权

    公开(公告)号：US10405418B2

    公开(公告)日：2019-09-03

    申请号：US15387604

    申请日：2016-12-21

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Chien-Min Hsu ,  Shih-Hsien Wu

    IPC: H03H7/38 ,  H05K1/02 ,  H01P3/02 ,  H01P1/22

    Abstract: A differential signal transmitting circuit board includes a substrate, at least two differential conductive elements, and at least one insulating element. The differential conductive elements are disposed in the substrate. The insulating element is disposed in the substrate. The insulating element is close to or contacted to the differential conductive elements. A material of the substrate has a first equivalent dielectric constant. A material of the insulating element has a second equivalent dielectric constant. The first equivalent dielectric constant is different from the second equivalent dielectric constant.

    Electronic device having substrate with electrically floating vias
    5.
    发明授权
    Electronic device having substrate with electrically floating vias 有权

    公开(公告)号：US11955417B2

    公开(公告)日：2024-04-09

    申请号：US17550602

    申请日：2021-12-14

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Tsung-Yi Hung ,  Shih-Hsien Wu

    IPC: H01L23/498 ,  H01L23/00

    CPC classification number: H01L23/49827 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

    Abstract: An electronic device includes a substrate, an upper conductive layer, and a lower conductive layer. The substrate has a plurality of inner vias and has an upper surface and a lower surface. The upper conductive layer includes an upper ground trace and an upper signal pad disposed on the upper surface. The upper ground trace is electrically connected to the ground vias and has an upper hollow portion exposing a part of the upper surface. The upper signal pad is disposed on the part of the upper surface exposed by the upper hollow portion and electrically connected to the signal via. The lower conductive layer includes a lower ground trace and a lower signal pad disposed on the lower surface. The lower conductive trace is electrically connected to the ground vias and has a lower hollow portion exposing a part of the lower surface. The lower signal pad is disposed on the part of the lower surface exposed by the lower hollow portion and electrically connected to the signal via.

    POWER DESIGN ARCHITECTURE
    7.
    发明公开
    POWER DESIGN ARCHITECTURE 审中-公开

    公开(公告)号：US20240220694A1

    公开(公告)日：2024-07-04

    申请号：US18149158

    申请日：2023-01-03

    Applicant: Industrial Technology Research Institute

    Inventor： Sheng-Che Hung ,  Shih-Hsien Wu ,  Hsu-Wei Liu ,  Tzong-Lin Wu

    IPC: G06F30/39

    CPC classification number: G06F30/39 ,  G06F2119/06

    Abstract: A power design architecture including a power supply circuit, a power wiring, at least one chip, a power ring, and a first reference conductor is provided. The power wiring is connected to the power supply circuit. The power ring is disposed around the chip and electrically connected to the chip and the power wiring. The first reference conductor is electrically connected to the chip. Low self-impedance is maintained at any position of the power ring.

    Circuit structure
    9.
    发明授权
    Circuit structure 有权

    公开(公告)号：US10448501B2

    公开(公告)日：2019-10-15

    申请号：US14968021

    申请日：2015-12-14

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Shih-Hsien Wu

    IPC: H05K1/02 ,  H05K3/46 ,  H05K3/42

    Abstract: A circuit structure includes an annular conductor, a conductive via and at least one extension conductor. The annular conductor extends along a direction. The conductive via is disposed in the annular conductor and extending along the direction. The at least one extension conductor is electrically connected to at least one end of the annular conductor and extending toward the conductive via.

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