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1.发明授权Scanning circuit for electronic multiselectors having mos transistor matrix 失效具有MOS晶体管矩阵的电子多选机的扫描电路
公开(公告)号：US3626371A
公开(公告)日：1971-12-07
申请号：US3626371D
申请日：1969-07-30
Applicant: INT STANDARD ELECTRIC CORP
IPC: H03K3/356 , H03K17/693 , H04Q3/52
CPC classification number: H03K3/356017 , H03K3/356 , H03K17/693 , H04Q3/521
Abstract: An electronic scanning circuit is provided using MOS integrated switches to set up electronic multiselectors. The electronic multiselectors are in the form of matrices of verticals and horizontals having MOS transistors forming the crosspoints.
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公开(公告)号：US3618024A
公开(公告)日：1971-11-02
申请号：US3618024D
申请日：1968-12-05
Applicant: INT STANDARD ELECTRIC CORP
IPC: H03K3/356 , H03K17/693 , H04Q3/52 , H04Q3/00
CPC classification number: H04Q3/521 , H03K3/356017 , H03K17/693
Abstract: A switching matrix includes horizontal and vertical multiples having MOS field effect transistor cross-points. A bistable circuit at the cross-point remembers the busy or idle state of the cross-point. The cross-point is particularly well adapted for integrated or monolithic devices.
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Patent Agency Ranking3.发明授权Electronic multiselector having large and small geometry mos transistor crosspoint control 失效具有大型和小型几何MOS晶体管触发控制的电子多选机
公开(公告)号：US3651467A
公开(公告)日：1972-03-21
申请号：US3651467D
申请日：1970-12-03
Applicant: INT STANDARD ELECTRIC CORP
IPC: G11C19/28 , H03K17/00 , H03K17/693 , H04Q3/52 , H04Q3/00
CPC classification number: H04Q3/521 , G11C19/28 , H03K17/693
Abstract: A memory unit is provided at each crosspoint of an electronic multiselector. The memory comprises a bistable element and a capacitor which keeps the crosspoint latched while external determinations are made concerning future changes of state of the crosspoint.
Abstract translation: 在电子多重选择器的每个交叉点提供存储单元。 存储器包括双稳态元件和电容器，其保持交叉点被锁定，同时对交叉点的状态的未来变化进行外部确定。
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公开(公告)号：US3593296A
公开(公告)日：1971-07-13
申请号：US3593296D
申请日：1969-04-28
Applicant: INT STANDARD ELECTRIC CORP
Inventor： GIRARD PIERRE , LEGER MARC JEAN PIERRE , LEROUGE CLAUDE PAUL HENRI , JEAN JACQUES HENRI DE
IPC: H03K3/356 , H03K17/693 , H04Q3/52
CPC classification number: H04Q3/521 , H03K3/356017 , H03K17/693
Abstract: An electronic multiselector employs metal-oxide-silicon FET transistors in logic circuits comprising NOR gates and inverters. Horizontal selection signals are delivered by a shift register which provides line scanning in a selection stage.
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公开(公告)号：US3626105A
公开(公告)日：1971-12-07
申请号：US3626105D
申请日：1969-06-23
Applicant: INT STANDARD ELECTRIC CORP
CPC classification number: G06F13/22 , H04Q3/5455 , H04Q3/54583 , H04Q2213/13057
Abstract: An interface unit is provided for connection between each of a plurality of peripheral devices and a central processing unit. The peripheral devices include such things as subscribers lines, trunks and junctors. The interface unit includes a temporary memory for storing status information or instructions regarding the peripheral devices. A permanent memory delivers regulating signals for scanning current test inputs and comparing them with data stored in the temporary memory. When there is a discrepancy in the data in the memories, the unit calls the central processor and sends its information to the central processor, where it is processed and new data is sent back to the unit.
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公开(公告)号：US3626104A
公开(公告)日：1971-12-07
申请号：US3626104D
申请日：1969-06-19
Applicant: INT STANDARD ELECTRIC CORP
CPC classification number: H04Q3/521
Abstract: A switching stage is provided which employs multiselectors formed by MOS crosspoints. The operations of path search, subscriber test and call detection are made by a cyclic exploration of all the possible paths between a junctor and one (or all) subscriber(s). The supervision data (''''off-hook'''' condition and ''''path established'''' condition) are obtained by monitoring the DC levels on the two speech conductors.
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7.发明授权
公开(公告)号：US3609661A
公开(公告)日：1971-09-28
申请号：US3609661D
申请日：1969-05-14
Applicant: INT STANDARD ELECTRIC CORP
IPC: H03K3/356 , H03K17/693 , H04Q3/52 , H04Q3/00
CPC classification number: H04Q3/521 , H03K3/356017 , H03K17/693
Abstract: An electronic switching system employing MOS monolithic transistors in a matrix of cross-points is disclosed. Control of the cross-points is provided by shift registers which operate in response to codes instead of a free running clock. Individual cross-points in the matrix can be closed regardless of the status of the other cross-points in the respective line.
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