Abstract:
An electronic multiselector employs metal-oxide-silicon FET transistors in logic circuits comprising NOR gates and inverters. Horizontal selection signals are delivered by a shift register which provides line scanning in a selection stage.
Abstract:
In a PCM communication system including a transmission line having a plurality of repeaters therealong, one at the end of each section of the line, a fault is located as follows. A repetitive code having a fundamental frequency F is propagated over the line from a transmitting station. A different detector responsive to frequency F is coupled to the output of each repeater. Each of the detectors is coupled to a different pulse generator. The pulse generators, before a fault responds to the detected frequency F to generate rectangular pulses having a given amplitude and a frequency F. These pulses are coupled to a supervisory transmission line without repeaters. At the receiving station measuring equipment detects the amplitude of the rectangular pulses on the supervisory line. The detected amplitude locates the fault. Where the communication system includes a plurality of main transmission lines, each pulse generator is common to the repeaters of a corresponding section of each of the main lines.
Abstract:
A circuit is disclosed for use in data switching wherein a twowire to four-wire conversion (''''hybrid'''' function) is performed by all-electronic means. These means comprise one complementary symmetry differential amplifier with emitter coupling per direction of transmission with adequate provision for minimizing interaction between both directions. Means are also provided for minimizing inter-line and inter-junctor crosstalk by supplying lines and junctors through active ''''gyrators'''' equivalent to series inductances.
Abstract:
In a two-wire to four-wire data switching center, the usual hybrid transformer(s) is replaced by a single transformer with a symmetrical secondary. Interaction between both directions of transmission is avoided by connecting the extremities of the secondary respectively to the output of a first current amplifier and to the input of a second current amplifier. This circuit is intended specifically for use with electronic switching such as that using MOS switching crosspoints and stages.
Abstract:
A digital to analog decoder or converter is disclosed. The decoder has a smooth nonlinear characteristic of the hyperbolic sine type. This smooth characteristic is contrasted to a nonlinear characteristic approximated by a plurality of straight line segments in the prior art. The decoder of this case includes a register to store a 7-digit code to be decoded. A first decoder circuit decodes the last four digits of the 7-digit code. Two groups of current generators (a first selection circuit) responding to the output of the first decoder produce two currents. A bipolar inverter (a second selection circuit) responding to the first of the last four digits directs the two currents to a third selection circuit. The third selection circuit responds to the output of of a second decoder to direct the two currents to the appropriate one of two ladder attenuators, the outputs of which produce the analog signal. The second decoder responds to the first three digits of the 7-digit code.