公开(公告)号：US3626378A

公开(公告)日：1971-12-07

申请号：US3626378D

申请日：1968-09-10

Applicant: INT STANDARD ELECTRIC CORP

Inventor： SALLE ADELIN EUGENE GASTON ,  TERMOTE ALOIS RENE ,  KOBUS STANISLAS

IPC: H04Q3/545 ,  G06F12/02 ,  H04Q3/00 ,  H04Q3/76 ,  G06F9/20

CPC classification number: H04Q3/00 ,  G06F12/02

Abstract: An addressing arrangement for accessing a memory storage location, and for accessing successive other locations if the first location returns a predetermined signal. A random number generator is used to provide the changes in the accessing location code. A specific application for which the arrangement is intended is to provide PBX hunting for an available line with a PBX group.

公开(公告)号：US3557315A

公开(公告)日：1971-01-19

申请号：US3557315D

申请日：1968-01-18

Applicant: INT STANDARD ELECTRIC CORP

Inventor： KOBUS STANISLAS ,  SALLE ADELIN EUGENE GASTON ,  FONTAINE BERNARD JEAN ROBERT ,  TERMOTE ALOIS RENE ,  MASURE JEAN LOUIS

IPC: H04Q3/545

CPC classification number: H04Q3/545

Abstract: The present system includes two programmed processors and a plurality of identical peripheral modules each comprising a switching network part and two network control circuits which are each permanently connected to a respective one of the two processors by transmission means. Both processors operate on a load-sharing basis and continuously inform one another about the characteristic phases of the operations performed in order that a correctly operating processor should be able to takeover the already started operations of a faulty processor. This continuous exchange of information is performed during interprocessor interrupt programs which are programs of highest priority. In decreasing order of priority, the other programs that are used include a clock interrupt program, an asynchronous switching interrupt program and a base level program. The system also includes means to detect a faulty processor by traffic comparison.

公开(公告)号：US3567865A

公开(公告)日：1971-03-02

申请号：US3567865D

申请日：1968-01-18

Applicant: INT STANDARD ELECTRIC CORP

Inventor： CHU PE TSI ,  ADELAAR HANS HELMUT ,  TERMOTE ALOIS RENE

IPC: H04Q3/54 ,  H04Q3/545

CPC classification number: H04Q3/54 ,  H04Q3/545

Abstract: In a telecommunication system having a plurality of line terminals and common control means, a novel switching network having a first and a second part is provided through which communication paths are established between selected pairs of the line terminals coupled to the first part. A first group of a plurality of output terminals of the first part is connected to a plurality of input terminals of the second part. A second group of the output terminals of the first part is directly connected to a selected group of output terminals of the second part. This manner of interconnection between the first and second parts eliminates the need for an additional switching network otherwise required in prior art devices for completing the communication paths between selected pairs of the line terminals.