CRYPTOGRAPHIC PROTECTION FOR TRUSTED OPERATING SYSTEMS

    公开(公告)号:US20170288874A1

    公开(公告)日:2017-10-05

    申请号:US15087144

    申请日:2016-03-31

    Abstract: This disclosure is directed to cryptographic protection for trusted operating systems. In general, a device may comprise for example, at least processing circuitry and memory circuitry. The device may be virtualized in that the processing circuitry may load virtual machines (VMs) and a virtual machine manager (VMM) into the memory circuitry during operation. At least one of the VMs may operate as a trusted execution environment (TEE) including a trusted operating system (TOS). The processing circuitry may comprise encryption circuitry to cryptographically protect the TOS. For example, the VMM may determine a first memory range in which the TOS will be loaded and store data regarding the first memory range in a register within the encryption circuitry. The register configures the encryption circuitry to cryptographically protect the TOS.

    TECHNIQUES FOR SECURE-CHIP MEMORY FOR TRUSTED EXECUTION ENVIRONMENTS

    公开(公告)号:US20180336342A1

    公开(公告)日:2018-11-22

    申请号:US15600666

    申请日:2017-05-19

    Abstract: Techniques for secure-chip memory for trusted execution environments are described. A processor may include a memory configured to interface with a trusted execution environment. The processor may be configured to indicate to a trusted execution environment that the memory supports dedicated access to the trusted execution environment. The processor may receive an instruction from the trusted execution environment. The processor may enforce an access control policy of an interface plugin to limit access of the memory by the trusted execution environment to a partition of the memory associated with the trusted execution environment. Other embodiments are described and claimed.

    TECHNIQUES FOR COMPRESSION MEMORY COLORING
    5.
    发明申请

    公开(公告)号:US20180181337A1

    公开(公告)日:2018-06-28

    申请号:US15390359

    申请日:2016-12-23

    CPC classification number: G06F9/30047 G06F21/79 H03M7/30 H03M7/6064

    Abstract: Techniques and computing devices for compression memory coloring are described. In one embodiment, for example, an apparatus may include at least one memory, at least on processor, and logic for compression memory coloring, at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to determine whether data to be written to memory is compressible, generate a compressed data element responsive to determining data is compressible, the data element comprising a compression indicator, a color, and compressed data, and write the compressed data element to memory. Other embodiments are described and claimed.

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