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    ATTACK DETECTION THROUGH SIGNAL DELAY MONITORING
    2.
    发明申请
    ATTACK DETECTION THROUGH SIGNAL DELAY MONITORING 审中-公开
    通过信号延迟监测进行的攻击检测

    公开(公告)号：US20160330216A1

    公开(公告)日：2016-11-10

    申请号：US14703609

    申请日：2015-05-04

    申请人： Intel Corporation

    发明人： EUGENE KISHINEVSKY ,  SIDDHARTHA CHHABRA

    IPC分类号： H04L29/06

    CPC分类号： H04L63/1416 ,  H04L63/1441

    摘要： The present disclosure is directed to attack detection through signal delay monitoring. An example system may comprise at least one device including a physical interface. At least one signal delay monitor may determine whether a signal being transmitted to the device is received as expected at the physical interface and indicate a potential attack when the signal is determined to not be received as expected. Determining whether the signal is received as expected may include determining whether the signal is received within a window defining a time period in which receipt of the signal is expected. An example signal monitor may comprise at least a new data reception monitoring module and an expected reception window monitoring module. These modules may include logic to determine whether the signal is received within the window. An indication of a potential attack may trigger, for example, security-related actions in the system.

    摘要翻译： 本发明涉及通过信号延迟监测进行的攻击检测。 示例系统可以包括至少一个包括物理接口的设备。 至少一个信号延迟监视器可以确定正在传输到设备的信号是否如物理接口所期望的那样被接收，并且当信号被确定为不按预期被接收时指示潜在的攻击。 确定信号是否按预期接收可以包括确定信号是否在限定期望接收信号的时间段的窗口内被接收。 示例信号监视器可以包括至少一个新的数据接收监视模块和预期的接收窗口监视模块。 这些模块可以包括用于确定信号是否在窗口内被接收的逻辑。 潜在攻击的指示可能会触发，例如系统中与安全相关的操作。

    CACHE AND DATA ORGANIZATION FOR MEMORY PROTECTION
    3.
    发明申请
    CACHE AND DATA ORGANIZATION FOR MEMORY PROTECTION 审中-公开
    用于记忆保护的缓存和数据组织

    公开(公告)号：US20160275018A1

    公开(公告)日：2016-09-22

    申请号：US14661044

    申请日：2015-03-18

    申请人： Intel Corporation

    发明人： SIDDHARTHA CHHABRA ,  RAGHUNANDAN MAKARAM ,  JIM MCCORMICK ,  BINATA BHATTACHARYYA

    IPC分类号： G06F12/14 ,  G06F12/08

    CPC分类号： G06F21/79

    摘要： This disclosure is directed to cache and data organization for memory protection. Memory protection operations in a device may be expedited by organizing cache and/or data structure while providing memory protection for encrypted data. An example device may comprise processing module and a memory module. The processing module may include a memory encryption engine (MEE) to decrypt encrypted data loaded from the memory module, or to encrypt plaintext data prior to storage in the memory module, using security metadata also stored in the memory module. Example security metadata may include version (VER) data, memory authentication code (MAC) data and counter data. Consistent with the present disclosure, a cache associated with the MEE may be partitioned to separate the VER and MAC data from counter data. Data organization may comprise including the VER and MAC data corresponding to particular data in the same data line.

    摘要翻译： 本公开涉及用于存储器保护的缓存和数据组织。 可以通过组织高速缓存和/或数据结构同时为加密的数据提供存储器保护来加速设备中的存储器保护操作。 示例设备可以包括处理模块和存储器模块。 处理模块可以包括用于解密从存储器模块加载的加密数据的存储器加密引擎（MEE），或者使用也存储在存储器模块中的安全元数据，在存储在存储器模块中之前加密明文数据。 示例安全元数据可以包括版本（VER）数据，存储器认证码（MAC）数据和计数器数据。 与本公开一致，可以将与MEE相关联的缓存分区以将VER和MAC数据与计数器数据分离。 数据组织可以包括在相同数据线中包括对应于特定数据的VER和MAC数据。

    METHOD AND APPARATUS FOR SHARING SECURITY METADATA MEMORY SPACE
    4.
    发明申请
    METHOD AND APPARATUS FOR SHARING SECURITY METADATA MEMORY SPACE 审中-公开

    公开(公告)号：US20200183861A1

    公开(公告)日：2020-06-11

    申请号：US16690614

    申请日：2019-11-21

    申请人： Intel Corporation

    发明人： SIDDHARTHA CHHABRA ,  DAVID M. DURHAM

    IPC分类号： G06F12/14 ,  H04L9/06 ,  G06F21/60 ,  G06F21/79 ,  G06F21/64 ,  G06F21/53

    摘要： The presently disclosed method and apparatus for sharing security metadata memory space proposes a technique to allow metadata sharing two different encryption techniques. A section of memory encrypted using a first type of encryption and having first security metadata associated therewith is converted to a section of memory encrypted using a second type of encryption and having second security metadata associated therewith. At least a portion of said first security metadata shares a memory space with at least a portion of said second security metadata for a same section of memory.

    AVOIDING REDUNDANT MEMORY ENCRYPTION IN A CRYPTOGRAPHIC PROTECTION SYSTEM
    7.
    发明申请
    AVOIDING REDUNDANT MEMORY ENCRYPTION IN A CRYPTOGRAPHIC PROTECTION SYSTEM 审中-公开

    公开(公告)号：US20170286320A1

    公开(公告)日：2017-10-05

    申请号：US15089280

    申请日：2016-04-01

    申请人： Intel Corporation

    发明人： SIDDHARTHA CHHABRA ,  DAVID M. DURHAM ,  PRASHANT DEWAN

    IPC分类号： G06F12/14 ,  G06F13/28

    摘要： This disclosure is directed to avoiding redundant memory encryption in a cryptographic protection system. Data stored in a device may be protected using different encryption systems. Data associated with at least one trusted execution environment (TEE) may be encrypted using a first encryption system. Main memory in the device may comprise data important to maintaining the integrity of an operating system (OS), etc. and may be encrypted using a second encryption system. Data may also be placed into a memory location via direct memory access (DMA) and may be protected utilizing a third encryption system. Redundant encryption may be avoided by encryption circuitry capable of determining when data is already protected by encryption provided by another system. For example, the encryption circuitry may comprise encryption control circuitry that monitors indicators set at different points during data handling, and may bypass certain data encryption or decryption operations based on the indicator settings.

    TECHNIQUES TO ENFORCE POLICIES FOR COMPUTING PLATFORM RESOURCES
    10.
    发明申请
    TECHNIQUES TO ENFORCE POLICIES FOR COMPUTING PLATFORM RESOURCES 有权

    公开(公告)号：US20220038505A1

    公开(公告)日：2022-02-03

    申请号：US17502787

    申请日：2021-10-15

    申请人： INTEL CORPORATION

    发明人： SIDDHARTHA CHHABRA ,  Prashant Dewan

    IPC分类号： H04L29/06 ,  H04L9/32 ,  G06F9/30 ,  G06F21/57 ,  G06F21/62 ,  G06F21/74

    摘要： Various embodiments are generally directed to techniques to enforce policies for computing platform resources, such as to prevent denial of service (DoS) attacks on the computing platform resources. Some embodiments are particularly directed to ISA instructions that allow trusted software/applications to securely enforce policies on a platform resource/device while allowing untrusted software to control allocation of the platform resource. In many embodiments, the ISA instructions may enable secure communication between a trusted application and a platform resource. In several embodiments, a first ISA instruction implemented by microcode may enable a trusted application to wrap policy information for secure transmission through an untrusted stack. In several such embodiments, a second ISA instruction implemented by microcode may enable untrusted software to verify the validity of the wrapped blobs and program registers associated with the platform resource with policy information provided via the wrapped blobs.