SECURE VIRTUAL MACHINE MIGRATION USING ENCRYPTED MEMORY TECHNOLOGIES

    公开(公告)号:US20210019172A1

    公开(公告)日:2021-01-21

    申请号:US17042114

    申请日:2018-06-28

    Abstract: A cryptographic data item utilized to derive a first cryptographic key employed by a first memory controller for implementing a first cryptographically protected execution environment for storing memory pages associated with a virtual machine may be received from a first host system via a first secure communication channel. The cryptographic data item may be transmitted to a second host system via a second secure communication channel for implementing a second cryptographically protected environment on the second host system. The first host system may be caused to migrate the memory pages of the virtual machine via an unsecured communication channel to the second host system for storing in the second cryptographically protected execution environment.

    TECHNOLOGIES FOR INTERNET OF THINGS KEY MANAGEMENT

    公开(公告)号:US20210203491A1

    公开(公告)日:2021-07-01

    申请号:US16649192

    申请日:2017-12-29

    Abstract: Technologies for key management of internet-of-things (IoT) devices include an IoT device, an authority center server, and a group management server. The IoT device is configured to authenticate with an authority center server via an offline communication channel, receive a group member private key as a function of the authentication with the authority center server, and authenticate with a group management server via a secure online communication channel using the group member private key. The IoT device is further configured to receive a group shared key as a function of the authentication with the group management server, encrypt secret data with the group shared key, and transmit the encrypted secret data to the group management server. Other embodiments are described herein.

    TECHNOLOGIES FOR HYBRID FIELD-PROGRAMMABLE GATE ARRAYAPPLICATION-SPECIFIC INTEGRATED CIRCUIT CODE ACCELERATION

    公开(公告)号:US20200233717A1

    公开(公告)日:2020-07-23

    申请号:US15755216

    申请日:2017-03-28

    Abstract: Technologies for hybrid acceleration of code include a computing device (100) having a processor (120), a field-programmable gate array (FPGA) (130), and an application-specific integrated circuit (ASIC) (132). The computing device (100) offloads a service request, such as a cryptographic request or a packet processing request, to the FPGA (130). The FPGA (130) performs one or more algorithmic tasks of an algorithm to perform the service request. The FPGA (130) determines one or more primitive tasks associated with an algorithm task and encapsulates each primitive task in a buffer that is accessible by the ASIC (132). The ASIC (132) performs the primitive tasks in response to encapsulation in the buffer, and the FPGA (130) returns results of the algorithm. The primitive operations may include cryptographic primitives such as modular exponentiation, modular multiplicative inverse, and modular multiplication. The results may be returned to the processor (120) or a network interface controller of the computing device (100).

    REMOTE REGISTER UPDATES
    5.
    发明申请

    公开(公告)号:US20200150734A1

    公开(公告)日:2020-05-14

    申请号:US16747202

    申请日:2020-01-20

    Abstract: Examples described herein provide for a first core to map a measurement of packet processing activity and operating parameters so that a second core can access the measurement of packet processing activity and potentially modify an operating parameter of the first core. The second core can modify operating parameters of the first core based on the measurement of packet processing activity. The first and second cores can be provisioned on start-up with a common key. The first and second cores can use the common key to encrypt or decrypt measurement of packet processing activity and operating parameters that are shared between the first and second cores. Accordingly, operating parameters of the first core can be modified by a different core while providing for secure modification of operating parameters.

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