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公开(公告)号:US20200242258A1
公开(公告)日:2020-07-30
申请号:US16845885
申请日:2020-04-10
Applicant: Intel Corporation
Inventor: Ned SMITH , Kshitij A. DOSHI , Francesc GUIM BERNAT , Kapil SOOD , Tarun VISWANATHAN
IPC: G06F21/60 , G06F15/173 , H04L9/32
Abstract: Examples herein relate to an interface selectively providing access to a memory region for a work request from an entity by providing selective access to a physical address of the memory region and selective access to a cryptographic key for use by a memory controller to access the memory region. In some examples, providing selective access to a physical address conversion is based on one or more of: validation of a certificate received with the work request and an identifier of the entity being associated with a process with access to the memory region. Access to the memory region can be specified to be one or more of: create, read, update, delete, write, or notify. A memory region can be a page or sub-page sized region. Different access rights can be associated with different sub-portions of the memory region, wherein the access rights comprise one or more of: create, read, update, delete, write, or notify.
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公开(公告)号:US20220272012A1
公开(公告)日:2022-08-25
申请号:US17744034
申请日:2022-05-13
Applicant: Intel Corporation
Inventor: S M Iftekharul ALAM , Ned SMITH , Vesh Raj SHARMA BANJADE , Satish C. JHA , Christian MACIOCCO , Mona VIJ , Kshitij A. DOSHI , Srikathyayani SRIKANTESWARA , Francesc GUIM BERNAT , Maruti GUPTA HYDE , Alexander BACHMUTSKY
IPC: H04L43/0811 , H04L43/0882 , H04L43/091 , H04L43/062
Abstract: Examples described herein relate to dynamically composing an application as a monolithic implementation or two or more microservices based on telemetry data. In some examples, based on composition of an application as two or more microservices, at least one connection between microservices based on telemetry data is adjusted. In some examples, a switch can be configured to perform forwarding of communications between microservices based on the adjusted at least one connection between microservices.
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公开(公告)号:US20200228630A1
公开(公告)日:2020-07-16
申请号:US16833448
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Francesc GUIM BERNAT , Karthik KUMAR , Dimitrios ZIAKAS , Mark A. SCHMISSEUR , Ned SMITH
IPC: H04L29/08 , H04L12/911 , H04L12/66
Abstract: A persistence service for edge architected computing systems extends current storage and memory schemes of edge resources to expose interfaces to allow an endpoint, such as an IoT device or client device, to specify criteria for achieving persistence for data stored in an edge resource. The persistence interface extends the storage and memory controllers to store data in accordance with the criteria, including determining whether a local or remote edge resource is best able to store data persistently in a manner that satisfies the criteria. The criteria include a persistence service level agreement, including a required time to persistence, cost of persistence and reliability level of persistence. Only edge resources that contain media, including storage subsystems and/or memory, capable of storing data persistently while satisfying the criteria will be permitted to service the request. The persistence service can include a discovery service to efficiently locate objects previously stored using the persistence service.
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公开(公告)号:US20240012769A1
公开(公告)日:2024-01-11
申请号:US18370621
申请日:2023-09-20
Applicant: Intel Corporation
Inventor: Francesc GUIM BERNAT , Manish DAVE , Vered BAR BRACHA , Bradley A. BURRES , Uzair QURESHI , Joseph GRECCO , Paul KAPPLER , Dirk F. BLEVINS , Mukesh Gangadhar BHAVANI VENKATESAN , Hariharan M , Marek PIOTROWSKI , Dhanya PILLAI , John MANGAN , Mandar CHINCHOLKAR , Eoin WALSH , Sumit MOHAN , Ned SMITH , Tushar Sudhakar GOHAD
CPC classification number: G06F13/1668 , G06F11/2017 , G06F2201/80
Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes a network interface, a direct memory access (DMA) circuitry, a host interface, memory, one or more processors, and circuitry to: based on a configuration of operation specifying a standalone operation, cause the network interface device to operate in standalone to execute one or more applications and based on a configuration of operation specifying a companion operation, cause the network interface device to operate in companion to provide at least one host system with access to one or more hardware resources accessible by the network interface device.
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公开(公告)号:US20220360646A1
公开(公告)日:2022-11-10
申请号:US17873618
申请日:2022-07-26
Applicant: Intel Corporation
Inventor: Francesc GUIM BERNAT , Kshitij A. DOSHI , Ned SMITH , Satish C. JHA , Vesh Raj SHARMA BANJADE , S M Iftekharul ALAM
Abstract: Switching architectures to manage mutex primitives used to control access to objects or data blocks that are being processed by two or more microservices in a data center are provided.
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公开(公告)号:US20230342449A1
公开(公告)日:2023-10-26
申请号:US18215752
申请日:2023-06-28
Applicant: Intel Corporation
Inventor: Eoin WALSH , Francesc GUIM BERNAT , Padraig CONNOLLY , Daniel SHEA , Ned SMITH
IPC: G06F21/44
CPC classification number: G06F21/44
Abstract: Examples described herein relate to a network interface device that includes a network interface, one or more processors, and circuitry to: register the network interface device and based on selection as an attestation device by the management controller from among multiple candidate network interface devices, receive attestation information and perform attestation of one or more devices.
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公开(公告)号:US20230138094A1
公开(公告)日:2023-05-04
申请号:US18090255
申请日:2022-12-28
Applicant: Intel Corporation
Inventor: Francesc GUIM BERNAT , Marcos E. CARRANZA , Cesar Ignacio MARTINEZ SPESSOT , Kshitij A. DOSHI , Ned SMITH
IPC: G06F3/06
Abstract: Methods and apparatus for opportunistic memory pools. The memory architecture is extended with logic that divides and tracks the memory fragmentation in each of a plurality of smart devices in two virtual memory partitions: (1) the allocated-unused partition containing memory that is earmarked for (allocated to), but remained un-utilized by the actual workloads running, or, by the device itself (bit-streams, applications, etc.); and (2) the unallocated partition that collects unused memory ranges and pushes them in to an Opportunistic Memory Pool (OMP) which is exposed to the platform's memory controller and operating system. The two partitions of the OMP allow temporary utilization of otherwise unused memory. Under alternate configurations, the total amount of memory resources is presented as a monolithic resource or two monolithic memory resources (unallocated and allocated but unused) available for utilization by the devices and applications running in the platform.
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公开(公告)号:US20220060322A1
公开(公告)日:2022-02-24
申请号:US17463453
申请日:2021-08-31
Applicant: INTEL CORPORATION
Inventor: Changzhen WEI , Junyuan WANG , Ned SMITH , Weigang LI , Ping YU
Abstract: Technologies for key management of internet-of-things (IoT) devices include an IoT device, an authority center server, and a group management server. The IoT device is configured to authenticate with an authority center server via an offline communication channel, receive a group member private key as a function of the authentication with the authority center server, and authenticate with a group management server via a secure online communication channel using the group member private key. The IoT device is further configured to receive a group shared key as a function of the authentication with the group management server, encrypt secret data with the group shared key, and transmit the encrypted secret data to the group management server. Other embodiments are described herein.
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公开(公告)号:US20240111879A1
公开(公告)日:2024-04-04
申请号:US18370137
申请日:2023-09-19
Applicant: Intel Corporation
Inventor: Ned SMITH , Kshitij A. DOSHI , Francesc GUIM BERNAT , Kapil SOOD , Tarun VISWANATHAN
IPC: G06F21/60 , G06F15/173 , H04L9/32
CPC classification number: G06F21/602 , G06F15/17331 , H04L9/3268
Abstract: Examples herein relate to an interface selectively providing access to a memory region for a work request from an entity by providing selective access to a physical address of the memory region and selective access to a cryptographic key for use by a memory controller to access the memory region. In some examples, providing selective access to a physical address conversion is based on one or more of: validation of a certificate received with the work request and an identifier of the entity being associated with a process with access to the memory region. Access to the memory region can be specified to be one or more of: create, read, update, delete, write, or notify. A memory region can be a page or sub-page sized region. Different access rights can be associated with different sub-portions of the memory region, wherein the access rights comprise one or more of: create, read, update, delete, write, or notify.
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公开(公告)号:US20220391494A1
公开(公告)日:2022-12-08
申请号:US17889989
申请日:2022-08-17
Applicant: Intel Corporation
Inventor: Ziye YANG , Malini K. BHANDARU , Ned SMITH
IPC: G06F21/53
Abstract: In a multitenant environment, confidential containers for the tenant having a trusted execution environment (TEE) which have security attested, can share data within the pod or between pods. The ability to share data for confidential containers of the same tenant eliminates the need to have multiple copies for different confidential containers. Thus, a storage device can store shared data specific to a tenant of the multitenant environment, and a caching service backed by protected hardware can manage access to the shared data. Management of the shared data can include attesting a key for a confidential container to verify that the confidential container is part of the TEE for a pod for the tenant, and access the shared data from the storage device for the confidential container based on the attested key.
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