公开(公告)号：US11271042B2

公开(公告)日：2022-03-08

申请号：US16958654

申请日：2018-03-16

Applicant: INTEL CORPORATION

Inventor： Anna Maria Conti ,  Cristina Casellato ,  Andrea Redaelli

IPC: H01L27/24 ,  H01L21/768 ,  H01L23/522

Abstract: One embodiment provides a method of making a memory device. The method includes forming a via in a bit line, an interlayer and a dielectric region. The bit line is formed on the interlayer. The interlayer is formed partially on the dielectric region and partially on a plurality of memory cells. The via has a first end included in, and in direct contact with, the bit line and a second end to couple to an electrical contact.