公开(公告)号：US09124455B1

公开(公告)日：2015-09-01

申请号：US14495768

申请日：2014-09-24

Applicant: INTEL CORPORATION

Inventor： Su Wei Lim ,  Ronald W. Swartz ,  Yueming Jiang ,  Hooi Kar Loo ,  Athourina Gevergiz ,  Bruce A. Tennant ,  Yick Yaw Ho ,  Poh Thiam Teoh ,  Jennifer Chin ,  Hui Shi

IPC: H03H7/30 ,  H04L25/03

CPC classification number: H04L25/03885 ,  H04L25/03343 ,  H04L2025/03681

Abstract: Techniques for embedded high speed serial interface methods are described herein. The techniques provide an apparatus for link equalization including an equalization control module to determine at least a first coefficient setting and a second coefficient setting at a remote transmitter based on an algorithm. The apparatus also includes a receiver margining module to determine a first margin value to be associated with the first coefficient setting and a second margin value to be associated with the second coefficient setting. The receiver margining module is to further determine if at least the first margin value is higher than the second margin value.

Abstract translation: 本文描述了嵌入式高速串行接口方法的技术。 这些技术提供了一种用于链路均衡的装置，包括均衡控制模块，用于基于算法确定在远程发射机处的至少第一系数设置和第二系数设置。 该装置还包括接收器边界模块，用于确定与第一系数设置相关联的第一边距值和与第二系数设置相关联的第二边距值。 接收器余量模块用于进一步确定至少第一边际值是否高于第二边际值。