公开(公告)号：US20200294998A1

公开(公告)日：2020-09-17

申请号：US16355195

申请日：2019-03-15

Applicant: INTEL CORPORATION

Inventor： AARON D. LILAK ,  EHREN MANNEBACH ,  ANH PHAN ,  RICHARD E. SCHENKER ,  STEPHANIE A. BOJARSKI ,  WILLY RACHMADY ,  PATRICK R. MORROW ,  JEFFERY D. BIELEFELD ,  GILBERT DEWEY ,  HUI JAE YOO

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L23/48 ,  H01L23/532

Abstract: Backside contact structures include etch selective materials to facilitate backside contact formation. An integrated circuit structure includes a frontside contact region, a device region below the frontside contact region, and a backside contact region below the device region. The device region includes a transistor. The backside contact region includes a first dielectric material under a source or drain region of the transistor, a second dielectric material laterally adjacent to the first dielectric material and under a gate structure of the transistor. A non-conductive spacer is between the first and second dielectric materials. The first and second dielectric materials are selectively etchable with respect to one another and the spacer. The backside contact region may include an interconnect feature that, for instance, passes through the first dielectric material and contacts a bottom side of the source/drain region, and/or passes through the second dielectric material and contacts the gate structure.