公开(公告)号：US20170290211A1

公开(公告)日：2017-10-05

申请号：US15089297

申请日：2016-04-01

Applicant: INTEL CORPORATION

Inventor： DANIEL CHAVEZ-CLEMENTE ,  XIAO LU ,  JIMIN YAO

IPC: H05K13/04 ,  H05K13/02

CPC classification number: H05K13/029 ,  H05K13/028 ,  H05K13/0482

Abstract: Templates to arrange and/or align components for batch placement on a substrate are described. A batch placement template can include a number of detents physically arranged relative to each other corresponding to a physical arrangement of components to be placed on a substrate. The detents can be sized to allow components to be manipulated into the detents and subsequently picked and placed on the substrate in a batch process.

公开(公告)号：US20200243956A1

公开(公告)日：2020-07-30

申请号：US16258573

申请日：2019-01-26

Applicant: INTEL CORPORATION

Inventor： ZHENGUO JIANG ,  OMKAR KARHADE ,  SRICHAITRA CHAVALI ,  ZHICHAO ZHANG ,  JIMIN YAO ,  STEPHEN SMITH ,  XIAOQIAN LI ,  ROBERT L. SANKMAN

IPC: H01Q1/38 ,  H01L23/00 ,  H01Q1/22 ,  H01L21/56

Abstract: An RF chip package comprises a housing and one or more conductive contacts designed to electrically connect the RF chip package to other conductive contacts. The housing includes a first substrate, a 3-D antenna on the first substrate, and a second substrate. The second substrate includes a plurality of semiconductor devices and is bonded to the first substrate. An interconnect structure allows for electrical connection between the first and second substrates. In some cases, the first substrate is flip-chip bonded to the second substrate or is otherwise connected to the second substrate by an array of solder balls. By integrating both the 3-D antenna and RF circuitry together in the same chip package, costs are minimized while bandwidth is greatly improved compared to a separately machined 3-D antenna.