公开(公告)号：US20190006319A1

公开(公告)日：2019-01-03

申请号：US15639640

申请日：2017-06-30

Applicant: INTEL CORPORATION

Inventor： OMKAR KARHADE ,  CHRISTOPHER L. RUMER ,  NITIN DESHPANDE ,  ROBERT M. NICKERSON

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/54 ,  H01L23/04

Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A gap forms between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package. Additionally, interstitial gaps form between each of the PoP semiconductor packages disposed on an organic substrate. A curable fluid material, such as a molding compound, may be flowed both in the interstitial spaces between the PoP semiconductor packages and into the gap between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package.

公开(公告)号：US20200243956A1

公开(公告)日：2020-07-30

申请号：US16258573

申请日：2019-01-26

Applicant: INTEL CORPORATION

Inventor： ZHENGUO JIANG ,  OMKAR KARHADE ,  SRICHAITRA CHAVALI ,  ZHICHAO ZHANG ,  JIMIN YAO ,  STEPHEN SMITH ,  XIAOQIAN LI ,  ROBERT L. SANKMAN

IPC: H01Q1/38 ,  H01L23/00 ,  H01Q1/22 ,  H01L21/56

Abstract: An RF chip package comprises a housing and one or more conductive contacts designed to electrically connect the RF chip package to other conductive contacts. The housing includes a first substrate, a 3-D antenna on the first substrate, and a second substrate. The second substrate includes a plurality of semiconductor devices and is bonded to the first substrate. An interconnect structure allows for electrical connection between the first and second substrates. In some cases, the first substrate is flip-chip bonded to the second substrate or is otherwise connected to the second substrate by an array of solder balls. By integrating both the 3-D antenna and RF circuitry together in the same chip package, costs are minimized while bandwidth is greatly improved compared to a separately machined 3-D antenna.

公开(公告)号：US20190006342A1

公开(公告)日：2019-01-03

申请号：US15639667

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： OMKAR KARHADE ,  NITIN DESHPANDE

IPC: H01L25/00 ,  H01L25/10 ,  H01L21/48 ,  H01L21/78 ,  H01L25/18

Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermal structure is physically and thermally coupled to the upper surface of the first semiconductor package and to the lower surface of the second semiconductor package. The thermal structure has opposed first and second surfaces and includes a first adhesive layer disposed across the first surface and a second adhesive layer disposed across the second surface. The first adhesive layer physically and thermally couples the thermal structure to the lower surface of the second semiconductor package. The second adhesive layer physically and thermally couples the thermal structure to the upper surface of the first semiconductor package.

公开(公告)号：US20190385983A1

公开(公告)日：2019-12-19

申请号：US16552459

申请日：2019-08-27

Applicant: Intel Corporation

Inventor： OMKAR KARHADE ,  CHRISTOPHER L. RUMER ,  NITIN DESHPANDE ,  ROBERT M. NICKERSON

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/54 ,  H01L23/04

Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A gap forms between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package. Additionally, interstitial gaps form between each of the PoP semiconductor packages disposed on an organic substrate. A curable fluid material, such as a molding compound, may be flowed both in the interstitial spaces between the PoP semiconductor packages and into the gap between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package.

公开(公告)号：US20190103385A1

公开(公告)日：2019-04-04

申请号：US15721235

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： OMKAR KARHADE ,  ROBERT L. SANKMAN ,  NITIN A. DESHPANDE ,  MITUL MODI ,  THOMAS J. DE BONIS ,  ROBERT M. NICKERSON ,  ZHIMIN WAN ,  HAIFA HARIRI ,  SRI CHAITRA J. CHAVALI ,  NAZMIYE ACIKGOZ AKBAY ,  FADI Y. HAFEZ ,  CHRISTOPHER L. RUMER

IPC: H01L25/10 ,  H01L23/367 ,  H01L23/373 ,  H01L25/00

Abstract: The present disclosure is directed to systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermally conductive member that includes at least one thermally conductive member may be disposed between the first semiconductor package and the second semiconductor package. The thermally conductive member may include: a single thermally conductive element; multiple thermally conductive elements; or a core that includes at least one thermally conductive element. The thermally conductive elements are thermally conductively coupled to an upper surface of the first semiconductor package and to the lower surface of the second semiconductor package to facilitate the transfer of heat from the first semiconductor package to the second semiconductor package.