公开(公告)号：US20170255560A1

公开(公告)日：2017-09-07

申请号：US15505879

申请日：2014-09-25

Applicant: INTEL CORPORATION

Inventor： Sai LUO ,  Tin-Fook NGAI ,  Hu CHEN ,  Xiaocheng ZHOU ,  Chunxiao LIN ,  Kang ZHAO

IPC: G06F12/0842 ,  G06F12/0831 ,  G06F12/0875

CPC classification number: G06F12/0842 ,  G06F11/36 ,  G06F11/3632 ,  G06F12/0831 ,  G06F12/0833 ,  G06F12/0875 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/452 ,  G06F2212/621

Abstract: A processing device includes a processing core, coupled to a memory, to execute a task including a code segment identified as being monitored and a kernel recorder, coupled to the processing core via a core interface. The kernel recorder includes a first filter circuit to responsive to determining that the task being executed enters the code segment, set the kernel recorder to a first mode under which the kernel recorder is to record, in a first record, a plurality of memory addresses accessed by the code segment, and responsive to determining that the execution of the task exits the code segment, set the kernel recorder to a second mode under which the kernel recorder is to detect a write operation to a memory address recorded in the first record and record the memory address in a second record.