公开(公告)号：US20170316201A1

公开(公告)日：2017-11-02

申请号：US15430652

申请日：2017-02-13

Applicant: INTEL CORPORATION

Inventor： KOICHI YAMADA ,  PALANIVELRAJAN SHANMUGAVELAYUTHAM ,  SRAVANI KONDA

IPC: G06F21/54 ,  G06F9/44 ,  G06F9/45 ,  G06F9/455

CPC classification number: G06F21/54 ,  G06F8/30 ,  G06F8/52 ,  G06F9/4552

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine a valid target address for a branch instruction from information stored in a relocation table, a linkage table, or both, the relocation table and the linkage table associated with a binary file and store the valid target address in a table in memory, the valid target address to validate a target address for a translated portion of a routine of the binary file.

公开(公告)号：US20160179546A1

公开(公告)日：2016-06-23

申请号：US14581871

申请日：2014-12-23

Applicant: INTEL CORPORATION

Inventor： KOICHI YAMADA ,  PALANIVELRAJAN SHANMUGAVELAYUTHAM ,  SRAVANI KONDA

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F21/54 ,  G06F8/30 ,  G06F8/52 ,  G06F9/4552

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine a valid target address for a branch instruction from information stored in a relocation table, a linkage table, or both, the relocation table and the linkage table associated with a binary file and store the valid target address in a table in memory, the valid target address to validate a target address for a translated portion of a routine of the binary file.

Abstract translation: 各种实施例通常涉及一种装置，方法和其他技术，以从存储在重定位表，链接表或二者中的信息确定分支指令的有效目标地址，重定位表和与二进制文件相关联的链接表 并将有效目标地址存储在存储器中的表中，该有效目标地址用于验证二进制文件的例程的翻译部分的目标地址。

公开(公告)号：US20180232541A1

公开(公告)日：2018-08-16

申请号：US15948853

申请日：2018-04-09

Applicant: INTEL CORPORATION

Inventor： KOICHI YAMADA ,  PALANIVELRAJAN SHANMUGAVELAYUTHAM ,  LIOR MALKA ,  ASHISH BIJLANI

IPC: G06F21/80 ,  G06F21/55 ,  G06F21/54 ,  G06F13/40 ,  G06F13/42 ,  G06F12/14 ,  G06F21/85 ,  G06F13/38

CPC classification number: G06F21/805 ,  G06F12/1483 ,  G06F13/387 ,  G06F13/404 ,  G06F13/4282 ,  G06F21/54 ,  G06F21/552 ,  G06F21/85 ,  G06F2221/2101

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine whether a target address of a register for an execution instruction is valid or invalid based on a comparison between the target address and one or more valid target addresses stored in a storage, increase a number of invalid target addresses if the target address is invalid, and determine whether the number of invalid target addresses is greater than an invalid target address threshold. Various embodiments may also include initiating a security measure to prevent a security breach if the number of invalid target addresses is greater than the invalid target address threshold or executing the execution instruction if the number of invalid target addresses is less than or equal to the invalid target address threshold.

公开(公告)号：US20160180115A1

公开(公告)日：2016-06-23

申请号：US14582114

申请日：2014-12-23

Applicant: INTEL CORPORATION

Inventor： KOICHI YAMADA ,  PALANIVELRAJAN SHANMUGAVELAYUTHAM ,  LIOR MALKA ,  ASHISH BIJLANI

IPC: G06F21/80 ,  G06F13/42 ,  G06F21/55 ,  G06F13/38 ,  G06F21/85 ,  G06F12/14 ,  G06F13/40

CPC classification number: G06F21/805 ,  G06F12/1483 ,  G06F13/387 ,  G06F13/404 ,  G06F13/4282 ,  G06F21/54 ,  G06F21/552 ,  G06F21/85 ,  G06F2221/2101

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine whether a target address of a register for an execution instruction is valid or invalid based on a comparison between the target address and one or more valid target addresses stored in a storage, increase a number of invalid target addresses if the target address is invalid, and determine whether the number of invalid target addresses is greater than an invalid target address threshold. Various embodiments may also include initiating a security measure to prevent a security breach if the number of invalid target addresses is greater than the invalid target address threshold or executing the execution instruction if the number of invalid target addresses is less than or equal to the invalid target address threshold.

Abstract translation: 各种实施例通常涉及一种装置，方法和其他技术，用于基于存储在存储器中的目标地址与一个或多个有效目标地址之间的比较来确定执行指令的寄存器的目标地址是有效还是无效， 如果目标地址无效，则增加无效目标地址的数量，并确定无效目标地址的数量是否大于无效的目标地址阈值。 各种实施例还可以包括启动安全措施，以防止无效目标地址的数量大于无效目标地址阈值时的安全漏洞，或者如果无效目标地址的数量小于或等于无效目标地址，则执行执行指令 地址阈值。