公开(公告)号：US20210281618A1

公开(公告)日：2021-09-09

申请号：US17313353

申请日：2021-05-06

Applicant: Intel Corporation

Inventor： LOKPRAVEEN MOSUR ,  ILANGO GANGA ,  ROBERT CONE ,  KSHITIJ ARUN DOSHI ,  JOHN J. BROWNE ,  MARK DEBBAGE ,  STEPHEN DOYLE ,  PATRICK FLEMING ,  DODDABALLAPUR JAYASIMHA

IPC: H04L29/06 ,  H04L12/863

Abstract: In one embodiment, a system includes a device and a host. The device includes a device stream buffer. The host includes a processor to execute at least a first application and a second application, a host stream buffer, and a host scheduler. The first application is associated with a first transmit streaming channel to stream first data from the first application to the device stream buffer. The first transmit streaming channel has a first allocated amount of buffer space in the device stream buffer. The host scheduler schedules enqueue of the first data from the first application to the first transmit streaming channel based at least in part on availability of space in the first allocated amount of buffer space in the device stream buffer. Other embodiments are described and claimed.

公开(公告)号：US20190102568A1

公开(公告)日：2019-04-04

申请号：US15721769

申请日：2017-09-30

Applicant: INTEL CORPORATION

Inventor： BRIAN S. HAUSAUER ,  LOKPRAVEEN B. MOSUR ,  TONY HURSON ,  PATRICK FLEMING ,  ADRIAN R. PEARSON

IPC: G06F21/62 ,  H04L29/06

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to de determine a secure memory region for a transaction, the secure memory region associated with a security association context to perform one or more of an encryption/decryption operation and an authentication operation for the transaction, perform one or more of the encryption/decryption operation and the authentication operation for the transaction based on the security association context, and cause communication of the transaction.

公开(公告)号：US20180004662A1

公开(公告)日：2018-01-04

申请号：US15201348

申请日：2016-07-01

Applicant: INTEL CORPORATION

Inventor： ANDREW CUNNINGHAM ,  MARK D. GRAY ,  ALEXANDER LECKEY ,  CHRIS MACNAMARA ,  STEPHEN T. PALERMO ,  PIERRE LAURENT ,  NIALL D. MCDONNELL ,  TOMASZ KANTECKI ,  PATRICK FLEMING

IPC: G06F12/0811 ,  G06F12/0831

CPC classification number: G06F12/0811 ,  G06F12/06 ,  G06F12/0831 ,  G06F12/126 ,  G06F2212/283 ,  G06F2212/621

Abstract: An input/output (I/O) device arranged to receive an information element including a payload, determine control information from the information element, classify the information element based on the control information, and issue a write to one of a plurality of computer-readable media based on the classification of the information element, the write to cause the payload to be written to the one of the plurality of computer-readable media.