公开(公告)号：US20210281618A1

公开(公告)日：2021-09-09

申请号：US17313353

申请日：2021-05-06

Applicant: Intel Corporation

Inventor： LOKPRAVEEN MOSUR ,  ILANGO GANGA ,  ROBERT CONE ,  KSHITIJ ARUN DOSHI ,  JOHN J. BROWNE ,  MARK DEBBAGE ,  STEPHEN DOYLE ,  PATRICK FLEMING ,  DODDABALLAPUR JAYASIMHA

IPC: H04L29/06 ,  H04L12/863

Abstract: In one embodiment, a system includes a device and a host. The device includes a device stream buffer. The host includes a processor to execute at least a first application and a second application, a host stream buffer, and a host scheduler. The first application is associated with a first transmit streaming channel to stream first data from the first application to the device stream buffer. The first transmit streaming channel has a first allocated amount of buffer space in the device stream buffer. The host scheduler schedules enqueue of the first data from the first application to the first transmit streaming channel based at least in part on availability of space in the first allocated amount of buffer space in the device stream buffer. Other embodiments are described and claimed.

公开(公告)号：US20160196153A1

公开(公告)日：2016-07-07

申请号：US14981388

申请日：2015-12-28

Applicant: INTEL CORPORATION

Inventor： MANI AYYAR ,  ERIC RICHARD DELANO ,  IOANNIS Y. SCHOINAS ,  AKHILESH KUMAR ,  DODDABALLAPUR JAYASIMHA ,  JOSE A. VARGAS

IPC: G06F9/445 ,  G06F9/50

CPC classification number: G06F9/44505 ,  G06F9/50 ,  G06F9/5011 ,  G06F13/00 ,  G06F13/24 ,  G06F13/4081 ,  G06F13/409

Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.