公开(公告)号：US12093836B2

公开(公告)日：2024-09-17

申请号：US17129521

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Mattias Marder ,  Estelle Aflalo ,  Avrech Ben-David ,  Shauharda Khadka ,  Somdeb Majumdar ,  Santiago Miret ,  Hanlin Tang

IPC: G06N3/10 ,  G06N3/045 ,  G06N3/086

CPC classification number: G06N3/10 ,  G06N3/045 ,  G06N3/086

Abstract: Automatic multi-objective hardware optimization for processing a deep learning network is disclosed. An example of a storage medium includes instructions for obtaining client preferences for a plurality of performance indicators for processing of a deep learning workload; generating a workload representation for the deep learning workload; providing the workload representation to machine learning processing to generate a workload executable, the workload executable including hardware mapping based on the client preferences; and applying the workload executable in processing of the deep learning workload.

公开(公告)号：US20220335286A1

公开(公告)日：2022-10-20

申请号：US17853608

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Daniel Cummings ,  Somdeb Majumdar ,  Anthony Sarah

IPC: G06N3/063 ,  G06N3/04 ,  G06F11/34

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for designing hardware. An example apparatus includes processor circuitry to execute machine readable instructions to determine a first hardware architectural configuration of a hardware component based on a design constraint, simulate an execution of the first hardware architectural configuration for a plurality of workloads to generate a respective plurality of objective design spaces, the objective design spaces based on one or more objectives; generate an aggregate score by aggregating a plurality of design space performance indicators, ones of the plurality of design space performance indicators corresponding to respective ones of the plurality of objective design spaces; search a design database based on the aggregate score to identify a second hardware architectural configuration, and predict a performance of the second hardware architectural configuration to generate a performance metric by executing a proxy function corresponding to the second hardware architectural configuration.

公开(公告)号：US11216719B2

公开(公告)日：2022-01-04

申请号：US16009456

申请日：2018-06-15

Applicant: INTEL CORPORATION

Inventor： Somdeb Majumdar ,  Ron Banner ,  Marcel Nassar ,  Lior Storfer ,  Adnan Agbaria ,  Evren Tumer ,  Tristan Webb ,  Xin Wang

IPC: G06N3/04 ,  G06N3/08 ,  G06N3/063

Abstract: Logic may quantize a primary neural network. Logic may generate, by a secondary neural network logic circuitry for a primary neural network logic circuitry, quantization parameters. The primary neural network logic circuitry may comprise a primary neural network with multiple layers trainable with an objective function. Each of the multiple layers of the primary neural network may comprise multiple tensors. The secondary neural network logic circuitry may comprise one or more secondary neural networks trainable with the objective function to output the quantization parameters to the tensors.

公开(公告)号：US20240020446A1

公开(公告)日：2024-01-18

申请号：US18477844

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Siddhartha Nath ,  Rajeshkumar Sambandam ,  Uday Mallappa ,  Somdeb Majumdar ,  Mariano Phielipp ,  Xia Zhu ,  Jianfang Olena Zhu ,  Francisco Javier Vera Rivera ,  Miaomiao Ma

IPC: G06F30/31 ,  G06N3/084

CPC classification number: G06F30/31 ,  G06N3/084

Abstract: Systems, apparatuses and methods may provide for technology that determines a vocabulary based on EDA tool terminologies and/or a natural language, queries and recommends, by a plurality of virtual agents, actions based on a design state and the vocabulary, wherein the plurality of agents is to include a tool agent and a designer agent, and executes a set of modifications to the design state in accordance with a collaboration between the plurality of agents. The technology may also convert a first user query from a first format to a second format, wherein the first format is incompatible with a trained AI model of a hardware architecture and the second format is compatible with the trained AI model, generate one or more predictions from the trained AI model based on the converted first user query, and select a subset of recommendations from a set of candidate architectures based on the prediction(s).

公开(公告)号：US20210150371A1

公开(公告)日：2021-05-20

申请号：US17129521

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Mattias Marder ,  Estelle Aflalo ,  Avrech Ben-David ,  Shauharda Khadka ,  Somdeb Majumdar ,  Santiago Miret ,  Hanlin Tang

IPC: G06N3/10 ,  G06N3/08 ,  G06N3/04

Abstract: Automatic multi-objective hardware optimization for processing a deep learning network is disclosed. An example of a storage medium includes instructions for obtaining client preferences for a plurality of performance indicators for processing of a deep learning workload; generating a workload representation for the deep learning workload; providing the workload representation to machine learning processing to generate a workload executable, the workload executable including hardware mapping based on the client preferences; and applying the workload executable in processing of the deep learning workload.